[PATCH v2 1/2] dt-bindings: clk: vc5: Add properties for configuring the SD/OE pin

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These properties allow configuring the SD/OE pin as described in the
datasheet.

Signed-off-by: Sean Anderson <sean.anderson@xxxxxxxx>
---

Changes in v2:
- Rename idt,sd-active-high to idt,output-enable-active-high
- Add idt,enable-shutdown

 .../bindings/clock/idt,versaclock5.yaml       | 33 +++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
index 28675b0b80f1..79d67fad5284 100644
--- a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
+++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
@@ -30,6 +30,22 @@ description: |
     3 -- OUT3
     4 -- OUT4
 
+  The idt,enable-shutdown and idt,output-enable-active-high properties
+  correspond to the SH and SP bits of the Primary Source and Shutdown
+  Register, respectively. Their behavior is summarized by the following
+  table:
+
+  SH SP SD/OE Output
+  == == ===== ========
+   0  0 Low   Active
+   0  0 High  Inactive
+   0  1 Low   Inactive
+   0  1 High  Active
+   1  0 Low   Active
+   1  0 High  Shutdown
+   1  1 Low   Inactive
+   1  1 High  Shutdown
+
 maintainers:
   - Luca Ceresoli <luca@xxxxxxxxxxxxxxxx>
 
@@ -64,6 +80,23 @@ properties:
     maximum: 22760
     description: Optional load capacitor for XTAL1 and XTAL2
 
+  idt,enable-shutdown:
+    $ref: /schemas/types.yaml#/definitions/flag
+    description: |
+      Enable the shutdown function when the SD/OE pin is high. This
+      corresponds to setting the SH bit of the Primary Source and
+      Shutdown Register. If this property is set, it takes precedence
+      over the usual enable/disable semantics of the SD/OE pin.
+
+  idt,output-enable-active-high:
+    $ref: /schemas/types.yaml#/definitions/flag
+    description: |
+      This enables output when the SD/OE pin is high, and disables
+      output when the SD/OE pin is low. This corresponds to setting the
+      SP bit of the Primary Source and Shutdown Register. If this
+      property is not present, then the SD/OE pin has the opposite
+      polarity (enabled when low, disabled when high).
+
 patternProperties:
   "^OUT[1-4]$":
     type: object
-- 
2.25.1




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