Add USB2.0 phy and host support to SoC DT. Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> --- This patch depend on [1] [1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20210609153230.6967-11-prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx/ --- arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 81 ++++++++++++++++++++++ 1 file changed, 81 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi index 47f9fafd6c06..2ffdaed6c9a5 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi @@ -158,6 +158,87 @@ <0x0 0x11940000 0 0x60000>; interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>; }; + + usbphyctrl: usbphyctrl@11c40000 { + compatible = "renesas,r9a07g044-usbphyctrl", + "renesas,rzg2l-usbphyctrl"; + reg = <0 0x11c40000 0 0x10000>; + #phy-cells = <1>; + }; + + ohci0: usb@11c50000 { + compatible = "generic-ohci"; + reg = <0 0x11c50000 0 0x100>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD R9A07G044_CLK_USB0>; + resets = <&cpg R9A07G044_CLK_USB0>; + phys = <&usbphyctrl 0>, <&usb2_phy0 1>; + phy-names = "usb"; + power-domains = <&cpg>; + status = "disabled"; + }; + + ohci1: usb@11c70000 { + compatible = "generic-ohci"; + reg = <0 0x11c70000 0 0x100>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD R9A07G044_CLK_USB1>; + resets = <&cpg R9A07G044_CLK_USB1>; + phys = <&usbphyctrl 1>, <&usb2_phy1 1>; + phy-names = "usb"; + power-domains = <&cpg>; + status = "disabled"; + }; + + ehci0: usb@11c50100 { + compatible = "generic-ehci"; + reg = <0 0x11c50100 0 0x100>; + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD R9A07G044_CLK_USB0>; + resets = <&cpg R9A07G044_CLK_USB0>; + phys = <&usbphyctrl 0>, <&usb2_phy0 2>; + phy-names = "usb"; + companion = <&ohci0>; + power-domains = <&cpg>; + status = "disabled"; + }; + + ehci1: usb@11c70100 { + compatible = "generic-ehci"; + reg = <0 0x11c70100 0 0x100>; + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD R9A07G044_CLK_USB1>; + resets = <&cpg R9A07G044_CLK_USB1>; + phys = <&usbphyctrl 1>, <&usb2_phy1 2>; + phy-names = "usb"; + companion = <&ohci1>; + power-domains = <&cpg>; + status = "disabled"; + }; + + usb2_phy0: usb-phy@11c50200 { + compatible = "renesas,usb2-phy-r9a07g044", + "renesas,rcar-gen3-usb2-phy"; + reg = <0 0x11c50200 0 0x700>; + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD R9A07G044_CLK_USB0>; + resets = <&cpg R9A07G044_CLK_USB0>; + #phy-cells = <1>; + power-domains = <&cpg>; + status = "disabled"; + }; + + usb2_phy1: usb-phy@11c70200 { + compatible = "renesas,usb2-phy-r9a07g044", + "renesas,rcar-gen3-usb2-phy"; + reg = <0 0x11c70200 0 0x700>; + interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD R9A07G044_CLK_USB1>; + resets = <&cpg R9A07G044_CLK_USB1>; + #phy-cells = <1>; + power-domains = <&cpg>; + status = "disabled"; + }; }; timer { -- 2.17.1
