On Fri, Jun 11, 2021 at 09:31:47AM +0300, Cristian Ciocaltea wrote: > On Fri, Jun 11, 2021 at 11:26:06AM +0530, Manivannan Sadhasivam wrote: > > On Fri, Jun 11, 2021 at 12:09:22AM +0300, Cristian Ciocaltea wrote: > > > Add pinctrl configuration for enabling the Ethernet MAC on RoseapplePi > > > SBC. Additionally, provide the necessary properties for the generic S500 > > > ethernet node in order to setup PHY and MDIO. > > > > > > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@xxxxxxxxx> > > > --- > > > arch/arm/boot/dts/owl-s500-roseapplepi.dts | 56 ++++++++++++++++++++++ > > > 1 file changed, 56 insertions(+) > > > > > > diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts > > > index b8c5db2344aa..bffabc7eaa50 100644 > > > --- a/arch/arm/boot/dts/owl-s500-roseapplepi.dts > > > +++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts [...] > > > + mdio { > > > + #address-cells = <1>; > > > + #size-cells = <0>; > > > + > > > + reset-gpios = <&pinctrl 88 GPIO_ACTIVE_LOW>; /* GPIOC24 */ > > > + reset-delay-us = <10000>; > > > + reset-post-delay-us = <150000>; > > > > reset-* properties belong to "ethernet-phy" node. Also, while adding new nodes > > please run the dtbs_check and try to address the warnings. > > The properties are those described in Documentation/devicetree/bindings/net/mdio.yaml Do you mean the reset properties are applicable for all PHYs in this SoC? > The dtbs_check doesn't report any issues in my case, usually this > happens when dtschema is not updated to the latest version. I always > run the following command after rebasing to a new kernel version: > > pip3 install --upgrade dtschema > That's good! Thanks, Mani > Thanks for the review, > Cristi > > > Thanks, > > Mani > > > > > + > > > + eth_phy: ethernet-phy@3 { > > > + reg = <0x3>; > > > + max-speed = <100>; > > > + interrupt-parent = <&sirq>; > > > + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; > > > + }; > > > + }; > > > +}; > > > + > > > &twd_timer { > > > status = "okay"; > > > }; > > > -- > > > 2.32.0 > > >