Hi Prabhakar,
On Fri, Jun 4, 2021 at 8:09 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> wrote:
> Add support for reading the LSI DEVID register which is present in
> SYSC block of RZ/G2{L,LC} SoC's.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> Reviewed-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
Thanks for your patch!
> --- a/drivers/soc/renesas/renesas-soc.c
> +++ b/drivers/soc/renesas/renesas-soc.c
> @@ -56,6 +56,11 @@ static const struct renesas_family fam_rzg2 __initconst __maybe_unused = {
> .reg = 0xfff00044, /* PRR (Product Register) */
> };
>
> +static const struct renesas_family fam_rzg2l __initconst __maybe_unused = {
> + .name = "RZ/G2L",
> + .reg = 0x11020a04,
Please don't add hardcoded register addresses for new SoCs (i.e. drop
".reg"). The "renesas,r9a07g044-sysc" is always present.
And if it were missing, the hardcoded fallback would lead into the
classic CCCR/PRR scheme, which is not correct for RZ/G2L...
> @@ -348,6 +361,25 @@ static int __init renesas_soc_init(void)
> goto done;
> }
>
> + np = of_find_compatible_node(NULL, NULL, "renesas,r9a07g044-sysc");
> + if (np) {
> + of_node_put(np);
> + chipid = ioremap(family->reg, 4);
Just use of_iomap(np, 0)...
> +
> + if (chipid) {
> + product = readl(chipid);
... and add the DEVID offset within the SYSC block here.
> + iounmap(chipid);
> +
> + if (soc->id && (product & 0xfffffff) != soc->id) {
> + pr_warn("SoC mismatch (product = 0x%x)\n",
> + product);
> + return -ENODEV;
> + }
> + }
> +
> + goto done;
> + }
> +
> /* Try PRR first, then hardcoded fallback */
> np = of_find_compatible_node(NULL, NULL, "renesas,prr");
> if (np) {
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
