On Mon, May 24, 2021 at 01:20:43PM +0300, Baruch Siach wrote: > DT binding for the PWM block in Qualcomm IPQ6018 SoC. > > Signed-off-by: Baruch Siach <baruch@xxxxxxxxxx> > --- > v2: Make #pwm-cells const (Rob Herring) > --- > .../devicetree/bindings/pwm/ipq-pwm.yaml | 52 +++++++++++++++++++ > 1 file changed, 52 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pwm/ipq-pwm.yaml > > diff --git a/Documentation/devicetree/bindings/pwm/ipq-pwm.yaml b/Documentation/devicetree/bindings/pwm/ipq-pwm.yaml > new file mode 100644 > index 000000000000..f85ce808a14e > --- /dev/null > +++ b/Documentation/devicetree/bindings/pwm/ipq-pwm.yaml > @@ -0,0 +1,52 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pwm/ipq-pwm.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm IPQ6018 PWM controller > + > +maintainers: > + - Baruch Siach <baruch@xxxxxxxxxx> > + > +properties: > + "#pwm-cells": > + const: 2 > + > + compatible: > + const: qcom,pwm-ipq6018 qcom,ipq6018-pwm is the normal ordering. > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + clock-names: > + const: core > + > +required: > + - "#pwm-cells" > + - compatible > + - reg > + - clocks > + - clock-names > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,gcc-ipq6018.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + pwm@1941010 { > + #pwm-cells = <2>; > + compatible = "qcom,pwm-ipq6018"; > + reg = <0x0 0x1941010 0x0 0x20>; > + clocks = <&gcc GCC_ADSS_PWM_CLK>; > + clock-names = "core"; > + }; > + }; > -- > 2.30.2
