This patch adds the GPIO and pin controller to the devicetree for the WPCM450 SoC. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@xxxxxxx> --- arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi index 8eba4897b41bc..1b63943b2a42b 100644 --- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi +++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi @@ -77,5 +77,16 @@ aic: interrupt-controller@b8002000 { interrupt-controller; #interrupt-cells = <2>; }; + + pinctrl: pinctrl@b8003000 { + compatible = "nuvoton,wpcm450-pinctrl"; + reg = <0xb8003000 0x1000>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH + 3 IRQ_TYPE_LEVEL_HIGH + 4 IRQ_TYPE_LEVEL_HIGH + 5 IRQ_TYPE_LEVEL_HIGH>; + }; }; }; -- 2.30.2