The Microchip 48l640 is a 8KByte EERAM connected via SPI. Add devicetree bindings documentation. Signed-off-by: Heiko Schocher <hs@xxxxxxx> --- Changes in v3: Add Fabio to cc Changes in v2: as Rob helped, fix warnings from running command 'make DT_CHECKER_FLAGS=-m dt_binding_check' .../bindings/mtd/microchip,mchp48l640.yaml | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/microchip,mchp48l640.yaml diff --git a/Documentation/devicetree/bindings/mtd/microchip,mchp48l640.yaml b/Documentation/devicetree/bindings/mtd/microchip,mchp48l640.yaml new file mode 100644 index 0000000000000..08089f2db0761 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/microchip,mchp48l640.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/mtd/microchip,mchp48l640.yaml#"; +$schema: "http://devicetree.org/meta-schemas/core.yaml#"; + +title: MTD SPI driver for Microchip 48l640 (and similar) serial EERAM + +maintainers: + - Heiko Schocher <hs@xxxxxxx> + +description: | + The Microchip 48l640 is a 8KByte EERAM connected via SPI. + + datasheet: http://ww1.microchip.com/downloads/en/DeviceDoc/20006055B.pdf + +properties: + compatible: + items: + - const: microchip,48l640 + + reg: + maxItems: 1 + + spi-max-frequency: true + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + spi-eeram@0 { + compatible = "microchip,48l640"; + reg = <0>; + spi-max-frequency = <20000000>; + }; + }; +... -- 2.31.1
