Hi, On Wed, May 26, 2021, at 09:18, Tony Lindgren wrote: > Hi, > > * Rob Herring <robh+dt@xxxxxxxxxx> [210525 18:09]: > > I would do a single node per mmio region with the register offset (or > > offset / 4) being the clock id. This can still support new SoCs easily > > if you have a fallback compatible. If you want/need to get all the > > clocks, just walk the DT 'clocks' properties and extract all the IDs. > > I mostly agree.. Except I'd also leave out the artificial clock ID and > just use real register offsets from the clock controller base instead. Sure, I'll do that. > > So a single clock controller node for each MMIO range, then set > #clock=cells = <1>. Then the binding follows what we have for the > interrupts-extended binding for example. > > If the clock controller optionally needs some data in the dts, > that can be added to the clock controller node. Or it can be driver > internal built-in data. If the data for dts can be described in a > generic way, even better :) Now the big question is *how* to describe this additional data in the dts. Essentially I need to specify that e.g. to enable clock 0x270 I first need to enable the (internal) clocks 0x1c0 and then 0x220. Are you aware of any generic way to describe this? I'm not even sure how a sane non-generic way would look like when I just have a single clock controller node. Best, Sven
