Add output_fmts and num_output_fmts value for all configuration.
Signed-off-by: Jitao Shi <jitao.shi@xxxxxxxxxxxx>
Signed-off-by: Rex-BC Chen <rex-bc.chen@xxxxxxxxxxxx>
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index f034ebd12fa6..a71f112e9a7a 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -123,6 +123,8 @@ struct mtk_dpi_conf {
u32 reg_h_fre_con;
u32 max_clock_khz;
bool edge_sel_en;
+ const u32 *output_fmts;
+ u32 num_output_fmts;
};
static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
@@ -702,10 +704,21 @@ static unsigned int mt8183_calculate_factor(int clock)
return 2;
}
+static const u32 mt8173_output_fmts[] = {
+ MEDIA_BUS_FMT_RGB888_1X24,
+};
+
+static const u32 mt8183_output_fmts[] = {
+ MEDIA_BUS_FMT_RGB888_2X12_LE,
+ MEDIA_BUS_FMT_RGB888_2X12_BE,
+};
+
static const struct mtk_dpi_conf mt8173_conf = {
.cal_factor = mt8173_calculate_factor,
.reg_h_fre_con = 0xe0,
.max_clock_khz = 300000,
+ .output_fmts = mt8173_output_fmts,
+ .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts),
};
static const struct mtk_dpi_conf mt2701_conf = {
@@ -713,18 +726,24 @@ static const struct mtk_dpi_conf mt2701_conf = {
.reg_h_fre_con = 0xb0,
.edge_sel_en = true,
.max_clock_khz = 150000,
+ .output_fmts = mt8173_output_fmts,
+ .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts),
};
static const struct mtk_dpi_conf mt8183_conf = {
.cal_factor = mt8183_calculate_factor,
.reg_h_fre_con = 0xe0,
.max_clock_khz = 100000,
+ .output_fmts = mt8183_output_fmts,
+ .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts),
};
static const struct mtk_dpi_conf mt8192_conf = {
.cal_factor = mt8183_calculate_factor,
.reg_h_fre_con = 0xe0,
.max_clock_khz = 150000,
+ .output_fmts = mt8173_output_fmts,
+ .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts),
};
static int mtk_dpi_probe(struct platform_device *pdev)
--
2.18.0
