Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx> writes: > The i2c controllers on the P1010 have an erratum where the documented > scheme for i2c bus recovery will not work (A-004447). A different > mechanism is needed which is documented in the P1010 Chip Errata Rev L. > > Signed-off-by: Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx> > --- > > Notes: > Changes in v3: > - New > > arch/powerpc/boot/dts/fsl/p1010si-post.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) Acked-by: Michael Ellerman <mpe@xxxxxxxxxxxxxx> cheers > diff --git a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi > index c2717f31925a..ccda0a91abf0 100644 > --- a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi > +++ b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi > @@ -122,7 +122,15 @@ memory-controller@2000 { > }; > > /include/ "pq3-i2c-0.dtsi" > + i2c@3000 { > + fsl,i2c-erratum-a004447; > + }; > + > /include/ "pq3-i2c-1.dtsi" > + i2c@3100 { > + fsl,i2c-erratum-a004447; > + }; > + > /include/ "pq3-duart-0.dtsi" > /include/ "pq3-espi-0.dtsi" > spi0: spi@7000 { > -- > 2.31.1