This sentence does not belong to this file as this file describes the bus on which various controllers are wired to. Signed-off-by: Miquel Raynal <miquel.raynal@xxxxxxxxxxx> --- .../devicetree/bindings/memory-controllers/pl353-smc.txt | 2 -- 1 file changed, 2 deletions(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt index e585f0022eca..52bff129cf7b 100644 --- a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt @@ -17,8 +17,6 @@ The child device node represents the controller connected to the SMC bus. Only one between: NAND controller, NOR controller and SRAM controller is allowed in a single system. -for NAND partition information please refer the below file -Documentation/devicetree/bindings/mtd/partition.txt Example: smcc: memory-controller@e000e000 -- 2.27.0
