On Tue, Jul 15, 2014 at 02:59:14PM +0200, Stefan Assmann wrote: > Looking at this more closely it seems to me that it's a regulator thing > after all. In the end it all boils down to a single register write. > twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0x41, 0x8e); > This is a write to the CLK32KG_CFG_STATE [1] register to power on the > device. The register description happening to mention power doesn't mean it's not functionally an enable for a clock. > I tried moving that to omap4xxx_dt_clk_init() but that won't work > because the twl core structures aren't initialized yet. > Any suggestions? Why not just add this to (or create a new) clock driver for the chip?
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