Re: [PATCH v2 09/17] crypto: qce: core: Add support to initialize interconnect path

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On 5/18/21 11:07 AM, Bjorn Andersson wrote:
On Wed 05 May 16:37 CDT 2021, Bhupesh Sharma wrote:

From: Thara Gopinath <thara.gopinath@xxxxxxxxxx>

Crypto engine on certain Snapdragon processors like sm8150, sm8250, sm8350
etc. requires interconnect path between the engine and memory to be
explicitly enabled and bandwidth set prior to any operations. Add support
in the qce core to enable the interconnect path appropriately.

Cc: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
Cc: Rob Herring <robh+dt@xxxxxxxxxx>
Cc: Andy Gross <agross@xxxxxxxxxx>
Cc: Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx>
Cc: David S. Miller <davem@xxxxxxxxxxxxx>
Cc: Stephen Boyd <sboyd@xxxxxxxxxx>
Cc: Michael Turquette <mturquette@xxxxxxxxxxxx>
Cc: Vinod Koul <vkoul@xxxxxxxxxx>
Cc: dmaengine@xxxxxxxxxxxxxxx
Cc: linux-clk@xxxxxxxxxxxxxxx
Cc: linux-crypto@xxxxxxxxxxxxxxx
Cc: devicetree@xxxxxxxxxxxxxxx
Cc: linux-kernel@xxxxxxxxxxxxxxx
Cc: bhupesh.linux@xxxxxxxxx
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@xxxxxxxxxx>
[Make header file inclusion alphabetical]
Signed-off-by: Thara Gopinath <thara.gopinath@xxxxxxxxxx>

This says that you prepared the patch, then Thara picked up the patch
and sorted the includes. But somehow you then sent the patch.

I.e. you name should be the last - unless you jointly wrote the path, in
which case you should also add a "Co-developed-by: Thara".

---
  drivers/crypto/qce/core.c | 35 ++++++++++++++++++++++++++++-------
  drivers/crypto/qce/core.h |  1 +
  2 files changed, 29 insertions(+), 7 deletions(-)

diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c
index 80b75085c265..92a0ff1d357e 100644
--- a/drivers/crypto/qce/core.c
+++ b/drivers/crypto/qce/core.c
@@ -5,6 +5,7 @@
#include <linux/clk.h>
  #include <linux/dma-mapping.h>
+#include <linux/interconnect.h>
  #include <linux/interrupt.h>
  #include <linux/module.h>
  #include <linux/mod_devicetable.h>
@@ -21,6 +22,8 @@
  #define QCE_MAJOR_VERSION5	0x05
  #define QCE_QUEUE_LENGTH	1
+#define QCE_DEFAULT_MEM_BANDWIDTH 393600

Do we know what this rate is?

+
  static const struct qce_algo_ops *qce_ops[] = {
  #ifdef CONFIG_CRYPTO_DEV_QCE_SKCIPHER
  	&skcipher_ops,
@@ -202,21 +205,35 @@ static int qce_crypto_probe(struct platform_device *pdev)
  	if (ret < 0)
  		return ret;
+ qce->mem_path = of_icc_get(qce->dev, "memory");

Using devm_of_icc_get() would save you some changes to the error path.

Right. I keep forgetting to use the devm_ version! Bhupesh, will you do these changes or do you want me to ?

--
Warm Regards
Thara






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