On Tue, May 18, 2021 at 1:14 AM <abelvesa@xxxxxxxxxx> wrote:
>
> From: Abel Vesa <abel.vesa@xxxxxxx>
>
> The mailbox of the lsio mu5a is used by rpmsg on imx8qxp and
> imx8dxl platforms.
>
> Signed-off-by: Abel Vesa <abel.vesa@xxxxxxx>
> ---
> arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
> index ee4e585a9c39..8e3c92c82fac 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
> @@ -141,6 +141,15 @@ lsio_mu4: mailbox@5d1f0000 {
> status = "disabled";
> };
>
> + lsio_mu5: mailbox@5d200000 {
> + compatible = "fsl,imx6sx-mu";
For normal devices node, the compatible string are prefered to be
defined in soc-ss-xxx.dtsi
in case to handle HW minus difference. e.g. mu13
> + reg = <0x5d200000 0x10000>;
> + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> + #mbox-cells = <2>;
> + power-domains = <&pd IMX_SC_R_MU_5A>;
> + };
> +
> +
> lsio_mu13: mailbox@5d280000 {
> reg = <0x5d280000 0x10000>;
> interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
> --
> 2.31.1
>
>
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