Add the description for the USB host port.
This port is linked to a resettable USB HUB so handle
this reset signal with a GPIO hog.
Signed-off-by: Adrien Grassein <adrien.grassein@xxxxxxxxx>
---
.../boot/dts/freescale/imx8mq-nitrogen.dts | 26 +++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts b/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts
index b46f45a82be1..5553f3c84dbc 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts
@@ -102,6 +102,15 @@ ethphy0: ethernet-phy@4 {
};
};
+/* Release reset of the USB Host HUB */
+&gpio1 {
+ usb-host-reset-hog {
+ gpio-hog;
+ gpios = <14 GPIO_ACTIVE_HIGH>;
+ output-high;
+ };
+};
+
&i2c1 {
clock-frequency = <400000>;
pinctrl-names = "default";
@@ -213,6 +222,17 @@ &usb3_phy0 {
status = "okay";
};
+&usb_dwc3_1 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usb3_phy1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb3_1>;
+ status = "okay";
+};
+
&usdhc1 {
assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
assigned-clock-rates = <400000000>;
@@ -388,6 +408,12 @@ MX8MQ_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x16
>;
};
+ pinctrl_usb3_1: usb3-1grp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x16
+ >;
+ };
+
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83
--
2.25.1
