On Tue, May 4, 2021 at 2:55 PM Arnd Bergmann <arnd@xxxxxxxx> wrote: > On Mon, May 3, 2021 at 11:16 PM Linus Walleij <linus.walleij@xxxxxxxxxx> wrote: > > > + compatible: > > + items: > > + - enum: > > + - intel,ixp42x-pci > > + - intel,ixp43x-pci > > + description: The two supported variants are ixp42x and ixp43x, > > + though more variants may exist. > > These are still wildcard names, better pick a real soc identifier > such as "ixp425" instead of "ixp42x" in case there are differences > after all. In general I agree. But when not even the vendor think they should be held apart that is another thing. Even the official Intel documentation uses these names: https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/ixp42x-product-line-network-processors-datasheet.pdf https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/ixp43x-product-line-network-processors-datasheet.pdf The differences seem to be very small and related to the NPE and page 23 in the 42x documentation makes no difference between them. I guess I will change it if you insist, but none of the other drivers have this fine-grained compatible strings. > > + <0x0800 0 0 1 &gpio0 11 3>, /* INT A on slot 1 is irq 11 */ > > + <0x0800 0 0 2 &gpio0 10 3>, /* INT B on slot 1 is irq 10 */ > > + <0x0800 0 0 3 &gpio0 9 3>, /* INT C on slot 1 is irq 9 */ > > + <0x0800 0 0 4 &gpio0 8 3>, /* INT D on slot 1 is irq 8 */ > > + <0x1000 0 0 1 &gpio0 10 3>, /* INT A on slot 2 is irq 10 */ > > + <0x1000 0 0 2 &gpio0 9 3>, /* INT B on slot 2 is irq 9 */ > > + <0x1000 0 0 3 &gpio0 8 3>, /* INT C on slot 2 is irq 8 */ > > + <0x1000 0 0 4 &gpio0 11 3>, /* INT D on slot 2 is irq 11 */ > > + <0x1800 0 0 1 &gpio0 9 3>, /* INT A on slot 3 is irq 9 */ > > + <0x1800 0 0 2 &gpio0 8 3>, /* INT B on slot 3 is irq 8 */ > > + <0x1800 0 0 3 &gpio0 11 3>, /* INT C on slot 3 is irq 11 */ > > + <0x1800 0 0 4 &gpio0 10 3>; /* INT D on slot 3 is irq 10 */ > > Is this different from the default swizzling rules? You normally > only have to provide the irqs for the bus once. The different board files for ixp4xx does the swizzling in different ways. The NSLU2 rotates only the top 3 IRQs and looks like this: + /* + * Taken from NSLU2 PCI boardfile, INT A, B, C swizzled D constant + * We have slots (IDSEL) 1, 2 and 3. + */ + interrupt-map = + /* IDSEL 1 */ + <0x0800 0 0 1 &gpio0 11 3>, /* INT A on slot 1 is irq 11 */ + <0x0800 0 0 2 &gpio0 10 3>, /* INT B on slot 1 is irq 10 */ + <0x0800 0 0 3 &gpio0 9 3>, /* INT C on slot 1 is irq 9 */ + <0x0800 0 0 4 &gpio0 8 3>, /* INT D on slot 1 is irq 8 */ + /* IDSEL 2 */ + <0x1000 0 0 1 &gpio0 10 3>, /* INT A on slot 2 is irq 10 */ + <0x1000 0 0 2 &gpio0 9 3>, /* INT B on slot 2 is irq 9 */ + <0x1000 0 0 3 &gpio0 11 3>, /* INT C on slot 2 is irq 11 */ + <0x1000 0 0 4 &gpio0 8 3>, /* INT D on slot 2 is irq 8 */ + /* IDSEL 3 */ + <0x1800 0 0 1 &gpio0 9 3>, /* INT A on slot 3 is irq 9 */ + <0x1800 0 0 2 &gpio0 11 3>, /* INT B on slot 3 is irq 11 */ + <0x1800 0 0 3 &gpio0 10 3>, /* INT C on slot 3 is irq 10 */ + <0x1800 0 0 4 &gpio0 8 3>; /* INT D on slot 3 is irq 8 */ Yours, Linus Walleij
