On Wed, May 5, 2021 at 2:11 PM Adam Ford <aford173@xxxxxxxxx> wrote:
>
> There are audio ports for SPDIF and MICFIL on the baseboard.
> Enable them.
>
Sorry for the noise, I copied these bindings from NXP's 5.10 branch,
but I didn't realize that fsl,imx-audio-micfil doesn't exist upstream.
I'm going to see if a simple audio driver will work. Either way, I'll
NAK my own work and submit a V2 later.
adam
> Signed-off-by: Adam Ford <aford173@xxxxxxxxx>
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
> index 6f5e63696ec0..3039a030f3d8 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
> @@ -65,6 +65,20 @@ sound {
> "AMIC", "MICBIAS",
> "IN3R", "AMIC";
> };
> +
> + sound-micfil {
> + compatible = "fsl,imx-audio-micfil";
> + model = "imx-audio-micfil";
> + cpu-dai = <&micfil>;
> + };
> +
> + sound-spdif {
> + compatible = "fsl,imx-audio-spdif";
> + model = "imx-spdif";
> + spdif-controller = <&spdif1>;
> + spdif-out;
> + spdif-in;
> + };
> };
>
> &ecspi2 {
> @@ -141,6 +155,15 @@ pca6416_1: gpio@21 {
> };
> };
>
> +&micfil {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_micfil>;
> + assigned-clocks = <&clk IMX8MM_CLK_PDM>;
> + assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
> + assigned-clock-rates = <196608000>;
> + status = "okay";
> +};
> +
> &sai3 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_sai3>;
> @@ -155,6 +178,23 @@ &snvs_pwrkey {
> status = "okay";
> };
>
> +&spdif1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_spdif1>;
> + assigned-clocks = <&clk IMX8MM_CLK_SPDIF1>;
> + assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
> + assigned-clock-rates = <24576000>;
> + clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_24M>,
> + <&clk IMX8MM_CLK_SPDIF1>, <&clk IMX8MM_CLK_DUMMY>,
> + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>,
> + <&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_DUMMY>,
> + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>,
> + <&clk IMX8MM_AUDIO_PLL1_OUT>, <&clk IMX8MM_AUDIO_PLL2_OUT>;
> + clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3",
> + "rxtx4", "rxtx5", "rxtx6", "rxtx7", "spba", "pll8k", "pll11k";
> + status = "okay";
> +};
> +
> &uart2 { /* console */
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_uart2>;
> @@ -209,6 +249,13 @@ MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x41
> >;
> };
>
> + pinctrl_micfil: micfilgrp {
> + fsl,pins = <
> + MX8MM_IOMUXC_SAI5_RXC_PDM_CLK 0xd6
> + MX8MM_IOMUXC_SAI5_RXD0_PDM_DATA0 0xd6
> + >;
> + };
> +
> pinctrl_pcal6414: pcal6414-gpiogrp {
> fsl,pins = <
> MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x19
> @@ -225,6 +272,14 @@ MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
> >;
> };
>
> + pinctrl_spdif1: spdif1grp {
> + fsl,pins = <
> + MX8MM_IOMUXC_SPDIF_TX_SPDIF1_OUT 0xd6
> + MX8MM_IOMUXC_SPDIF_RX_SPDIF1_IN 0xd6
> + MX8MM_IOMUXC_SPDIF_EXT_CLK_SPDIF1_EXT_CLK 0xd6
> + >;
> + };
> +
> pinctrl_uart2: uart2grp {
> fsl,pins = <
> MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
> --
> 2.25.1
>
