On Tue, May 04, 2021 at 06:59:35PM +0800, Greentime Hu wrote:
> We add pcie_aux clock in this patch so that pcie driver can use
> clk_prepare_enable() and clk_disable_unprepare() to enable and disable
> pcie_aux clock.
>
> Signed-off-by: Greentime Hu <greentime.hu@xxxxxxxxxx>
> Acked-by: Stephen Boyd <sboyd@xxxxxxxxxx>
> ---
> drivers/clk/sifive/fu740-prci.c | 11 +++++
> drivers/clk/sifive/fu740-prci.h | 2 +-
> drivers/clk/sifive/sifive-prci.c | 41 +++++++++++++++++++
> drivers/clk/sifive/sifive-prci.h | 9 ++++
> include/dt-bindings/clock/sifive-fu740-prci.h | 1 +
> 5 files changed, 63 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/sifive/fu740-prci.c b/drivers/clk/sifive/fu740-prci.c
> index 764d1097aa51..53f6e00a03b9 100644
> --- a/drivers/clk/sifive/fu740-prci.c
> +++ b/drivers/clk/sifive/fu740-prci.c
> @@ -72,6 +72,12 @@ static const struct clk_ops sifive_fu740_prci_hfpclkplldiv_clk_ops = {
> .recalc_rate = sifive_prci_hfpclkplldiv_recalc_rate,
<...>
> +/* PCIE AUX clock APIs for enable, disable. */
> +int sifive_prci_pcie_aux_clock_is_enabled(struct clk_hw *hw)
It should be bool
> +{
> + struct __prci_clock *pc = clk_hw_to_prci_clock(hw);
> + struct __prci_data *pd = pc->pd;
> + u32 r;
> +
> + r = __prci_readl(pd, PRCI_PCIE_AUX_OFFSET);
> +
> + if (r & PRCI_PCIE_AUX_EN_MASK)
> + return 1;
> + else
> + return 0;
> +}
and here simple "return r & PRCI_PCIE_AUX_EN_MASK;"
> +
> +int sifive_prci_pcie_aux_clock_enable(struct clk_hw *hw)
> +{
> + struct __prci_clock *pc = clk_hw_to_prci_clock(hw);
> + struct __prci_data *pd = pc->pd;
> + u32 r __maybe_unused;
> +
> + if (sifive_prci_pcie_aux_clock_is_enabled(hw))
> + return 0;
You actually call to this new function only once, put your
__prci_readl() here.
Thanks
