Hi Benjamin, Please check robh/dtbs-check failed build log at https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20210422072442.111070-2-benjamin.gaignard@xxxxxxxxxxxxx/ make ARCH=arm64 dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml Test if all notifications are gone. === YAML also checks extra properties like "power-domains" not yet included but needed for rk3568. Add them in a separate patch. === rk3229-evb.dt.yaml: iommu@20030480: 'iommu-cells' does not match any of the regexes Change a rk322x.dtsi property to #iommu-cells in a separate patch. === rk3229-xms6.dt.yaml: iommu@20030480: reg: [[537068672, 64], [537068736, 64]] is too long Change reg minItems maxItems. === Johan On 4/22/21 9:24 AM, Benjamin Gaignard wrote: > Convert Rockchip IOMMU to DT schema > > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@xxxxxxxxxxxxx> > --- > .../bindings/iommu/rockchip,iommu.txt | 38 ---------- > .../bindings/iommu/rockchip,iommu.yaml | 76 +++++++++++++++++++ > 2 files changed, 76 insertions(+), 38 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/iommu/rockchip,iommu.txt > create mode 100644 Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml > > diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt > deleted file mode 100644 > index 6ecefea1c6f9..000000000000 > --- a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt > +++ /dev/null > @@ -1,38 +0,0 @@ > -Rockchip IOMMU > -============== > - > -A Rockchip DRM iommu translates io virtual addresses to physical addresses for > -its master device. Each slave device is bound to a single master device, and > -shares its clocks, power domain and irq. > - > -Required properties: > -- compatible : Should be "rockchip,iommu" > -- reg : Address space for the configuration registers > -- interrupts : Interrupt specifier for the IOMMU instance > -- interrupt-names : Interrupt name for the IOMMU instance > -- #iommu-cells : Should be <0>. This indicates the iommu is a > - "single-master" device, and needs no additional information > - to associate with its master device. See: > - Documentation/devicetree/bindings/iommu/iommu.txt > -- clocks : A list of clocks required for the IOMMU to be accessible by > - the host CPU. > -- clock-names : Should contain the following: > - "iface" - Main peripheral bus clock (PCLK/HCL) (required) > - "aclk" - AXI bus clock (required) > - > -Optional properties: > -- rockchip,disable-mmu-reset : Don't use the mmu reset operation. > - Some mmu instances may produce unexpected results > - when the reset operation is used. > - > -Example: > - > - vopl_mmu: iommu@ff940300 { > - compatible = "rockchip,iommu"; > - reg = <0xff940300 0x100>; > - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; > - interrupt-names = "vopl_mmu"; > - clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; > - clock-names = "aclk", "iface"; > - #iommu-cells = <0>; > - }; > diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml b/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml > new file mode 100644 > index 000000000000..ab128f8e4c73 > --- /dev/null > +++ b/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml > @@ -0,0 +1,76 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) GPL-2.0 This is a conversion of an existing document. > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/iommu/rockchip,iommu.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Rockchip IOMMU > + > +maintainers: > + - Simon Xue <xxm@xxxxxxxxxxxxxx> - Heiko Stuebner <heiko@xxxxxxxxx> Add someone that can respond in a short time in case rob+dt wants to delete something. > + > +description: |+ > + A Rockchip DRM iommu translates io virtual addresses to physical addresses for > + its master device. Each slave device is bound to a single master device, and No comma "," before "and" > + shares its clocks, power domain and irq. > + > + For information on assigning IOMMU controller to its peripheral devices, > + see generic IOMMU bindings. > + > +properties: > + compatible: > + const: rockchip,iommu > + > + reg: > + maxItems: 1 minItems: 1 maxItems: 2 > + > + interrupts: > + maxItems: 1 > + > + interrupt-names: > + maxItems: 1 > + > + clocks: > + items: > + - description: Core clock > + - description: Interface clock > + > + clock-names: > + items: > + - const: aclk > + - const: iface > + > + "#iommu-cells": > + const: 0 > + power-domains: maxItems: 1 Add in separate patch for review by rob+bt > + rockchip,disable-mmu-reset: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + Don't use the mmu reset operation. Do not use .... The use of "'" in a YAML description gives problems in some text highlighters. Try to avoid. > + Some mmu instances may produce unexpected results > + when the reset operation is used. > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + - "#iommu-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/rk3399-cru.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > + vopl_mmu: iommu@ff940300 { > + compatible = "rockchip,iommu"; > + reg = <0xff940300 0x100>; > + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "vopl_mmu"; > + clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; > + clock-names = "aclk", "iface"; > + #iommu-cells = <0>; > + }; >
