On Tue, Apr 20, 2021 at 04:10:34PM +0200, Michael Walle wrote: > Hi Vladimir, > > Am 2021-04-20 16:04, schrieb Vladimir Oltean: > > On Tue, Apr 20, 2021 at 03:27:24PM +0200, Michael Walle wrote: > > > Hi Vladimir, > > > > > > Am 2021-04-17 01:42, schrieb Vladimir Oltean: > > > > From: Vladimir Oltean <vladimir.oltean@xxxxxxx> > > > > > > > > This patch series contains logic for enabling the lossless mode on the > > > > RX rings of the ENETC, and the PAUSE thresholds on the internal FIFO > > > > memory. > > > > > > > > During testing it was found that, with the default FIFO configuration, > > > > a sender which isn't persuaded by our PAUSE frames and keeps sending > > > > will cause some MAC RX frame errors. To mitigate this, we need to ensure > > > > that the FIFO never runs completely full, so we need to fix up a setting > > > > that was supposed to be configured well out of reset. Unfortunately this > > > > requires the addition of a new mini-driver. > > > > > > What happens if the mini driver is not enabled? Then the fixes aren't > > > applied and bad things happen (now with the addition of flow control), > > > right? > > > > > > I'm asking because, if you have the arm64 defconfig its not enabled. > > > > > > shouldn't it be something like: > > > > > > diff --git a/drivers/net/ethernet/freescale/enetc/Kconfig > > > b/drivers/net/ethernet/freescale/enetc/Kconfig > > > index d88f60c2bb82..cdc0ff89388a 100644 > > > --- a/drivers/net/ethernet/freescale/enetc/Kconfig > > > +++ b/drivers/net/ethernet/freescale/enetc/Kconfig > > > @@ -2,7 +2,7 @@ > > > config FSL_ENETC > > > tristate "ENETC PF driver" > > > depends on PCI && PCI_MSI > > > - depends on FSL_ENETC_IERB || FSL_ENETC_IERB=n > > > + select FSL_ENETC_IERB > > > select FSL_ENETC_MDIO > > > select PHYLINK > > > select PCS_LYNX > > > > Yes, ideally the IERB driver and the ENETC PF driver should be built in > > the same way, or the IERB driver can be built-in and the PF driver can > > be module. I don't know how to express this using Kconfig, sorry. > > With the small patch above it is: > FSL_ENETC=m -> FSL_ENETC_IERB = m or y > FSL_ENETC=y -> FSL_ENETC_IERB = y > FSL_ENETC=n -> FSL_ENETC_IERB = m,y or n > > Will you fix it? Should I prepare a patch? Could you please send the patch? Thanks.
