+PPC and PCI lists On Thu, Apr 15, 2021 at 1:01 PM Leonardo Bras <leobras.c@xxxxxxxxx> wrote: > > Many other resource flag parsers already add this flag when the input > has bits 24 & 25 set, so update this one to do the same. Many others? Looks like sparc and powerpc to me. Those would be the ones I worry about breaking. Sparc doesn't use of/address.c so it's fine. Powerpc version of the flags code was only fixed in 2019, so I don't think powerpc will care either. I noticed both sparc and powerpc set PCI_BASE_ADDRESS_MEM_TYPE_64 in the flags. AFAICT, that's not set anywhere outside of arch code. So never for riscv, arm and arm64 at least. That leads me to pci_std_update_resource() which is where the PCI code sets BARs and just copies the flags in PCI_BASE_ADDRESS_MEM_MASK ignoring IORESOURCE_* flags. So it seems like 64-bit is still not handled and neither is prefetch. > Some devices (like virtio-net) have more than one memory resource > (like MMIO32 and MMIO64) and without this flag it would be needed to > verify the address range to know which one is which. > > Signed-off-by: Leonardo Bras <leobras.c@xxxxxxxxx> > --- > drivers/of/address.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/of/address.c b/drivers/of/address.c > index 73ddf2540f3f..dc7147843783 100644 > --- a/drivers/of/address.c > +++ b/drivers/of/address.c > @@ -116,9 +116,12 @@ static unsigned int of_bus_pci_get_flags(const __be32 *addr) > flags |= IORESOURCE_IO; > break; > case 0x02: /* 32 bits */ > - case 0x03: /* 64 bits */ > flags |= IORESOURCE_MEM; > break; > + > + case 0x03: /* 64 bits */ > + flags |= IORESOURCE_MEM | IORESOURCE_MEM_64; > + break; > } > if (w & 0x40000000) > flags |= IORESOURCE_PREFETCH; > -- > 2.30.2 >
