On Wed, Apr 7, 2021, at 12:44, Will Deacon wrote:
> On Sun, Mar 28, 2021 at 09:40:07AM +0200, Sven Peter wrote:
[...]
> >
> > +static struct io_pgtable *
> > +apple_dart_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie)
> > +{
> > + struct arm_lpae_io_pgtable *data;
> > +
> > + if (cfg->ias > 36)
> > + return NULL;
> > + if (cfg->oas > 36)
> > + return NULL;
> > +
> > + if (!cfg->coherent_walk)
> > + return NULL;
>
> This all feels like IOMMU-specific limitations leaking into the page-table
> code here; it doesn't feel so unlikely that future implementations of this
> IP might have greater addressing capabilities, for example, and so I don't
> see why the page-table code needs to police this.
That's true, this really doesn't belong here.
I'll fix it for the next version and make sure to keep iommu-specific
limitations inside the driver itself.
>
> > + cfg->pgsize_bitmap &= SZ_16K;
> > + if (!cfg->pgsize_bitmap)
> > + return NULL;
>
> This is worrying (and again, I don't think this belongs here). How is this
> thing supposed to work if the CPU is using 4k pages?
This SoC is just full of fun surprises!
I didn't even think about that case since I've always been using 16k pages so far.
I've checked again and wasn't able to find any way to configure the pagesize
of the IOMMU. There seem to be variants of this IP in older iPhones which
support a 4k pagesize but to the best of my knowledge this is hard wired
and not configurable in software.
When booting with 4k pages I hit the BUG_ON in iova.c that ensures that the
iommu pagesize has to be <= the cpu page size.
I see two options here and I'm not sure I like either of them:
1) Just don't support 4k CPU pages together with IOMMU translations and only
allow full bypass mode there.
This would however mean that PCIe (i.e. ethernet, usb ports on the Mac
mini) and possibly Thunderbolt support would not be possible since these
devices don't seem to like iommu bypass mode at all.
2) I've had a brief discussion on IRC with Arnd about this [1] and he pointed
out that the dma_map_sg API doesn't make any guarantees about the returned
iovas and that it might be possible to make this work at least for devices
that go through the normal DMA API.
I've then replaced the page size check with a WARN_ON in iova.c just to see
what happens. At least normal devices that go through the DMA API seem to
work with my configuration. iommu_dma_alloc took the iommu_dma_alloc_remap
path which was called with the cpu page size but then used
domain->pgsize_bitmap to increase that to 16k. So this kinda works out, but
there are other functions in dma-iommu.c that I believe rely on the fact that
the iommu can map single cpu pages. This feels very fragile right now and
would probably require some rather invasive changes.
Any driver that tries to use the iommu API directly could be trouble
as well if they make similar assumptions.
Is this something you would even want to support in the iommu subsytem
and is it even possible to do this in a sane way?
Best,
Sven
[1] https://freenode.irclog.whitequark.org/asahi/2021-04-07#29609786;
