Add documentation for the imx8m(m|n|p) power domain driver. Signed-off-by: Adrien Grassein <adrien.grassein@xxxxxxxxx> --- .../bindings/power/fsl,imx-power-domain.yaml | 89 +++++++++++++++++++ MAINTAINERS | 8 ++ include/dt-bindings/power/imx8mm-power.h | 21 +++++ include/dt-bindings/power/imx8mn-power.h | 15 ++++ include/dt-bindings/power/imx8mp-power.h | 28 ++++++ 5 files changed, 161 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/fsl,imx-power-domain.yaml create mode 100644 include/dt-bindings/power/imx8mm-power.h create mode 100644 include/dt-bindings/power/imx8mn-power.h create mode 100644 include/dt-bindings/power/imx8mp-power.h diff --git a/Documentation/devicetree/bindings/power/fsl,imx-power-domain.yaml b/Documentation/devicetree/bindings/power/fsl,imx-power-domain.yaml new file mode 100644 index 000000000000..8b4811aa80eb --- /dev/null +++ b/Documentation/devicetree/bindings/power/fsl,imx-power-domain.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/fsl,imx-power-domain.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX 8mm, 8mn and 8mp Power Domain + +maintainers: + - Adrien Grassein <adrien.grassein@xxxxxxxxx> + +description: |+ + i.MX processors include support for multiple power domains which are used + to gate power to one or more peripherals on the processor. + +allOf: + - $ref: power-domain.yaml# + +properties: + compatible: + enum: + - fsl,imx8mm-pm-domain + - fsl,imx8mn-pm-domain + - fsl,imx8mp-pm-domain + + domain-name: + $ref: /schemas/types.yaml#/definitions/string + description: | + Human readable string with domain name. Will be visible in userspace + to let user to distinguish between multiple domains in SoC. + + domain-index: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Power domain index. Valid values are defined in + include/dt-bindings/power/imx8mm-power.h for i.MX 8mm + include/dt-bindings/power/imx8mn-power.h for i.MX 8mn + include/dt-bindings/power/imx8mp-power.h for i.MX 8mp + + maxItems: 1 + + clocks: + description: | + A number of phandles to clocks that need to be enabled during domain + power-up sequencing to ensure reset propagation into devices located + inside this power domain. + minItems: 1 + maxItems: 6 + + power-supply: + description: + A phandle to a supply to enable when powering on the domain. + + fsl,active-wakeup: + $ref: /schemas/types.yaml#/definitions/flag + description: + Instructs genpd to keep the PM domain powered on. + + fsl,rpm-always-on: + $ref: /schemas/types.yaml#/definitions/flag + description: + Instructs genpd to always keep the PM domain powered on except + for system suspend. + + "#power-domain-cells": + const: 0 + + power-domains: + maxItems: 1 + +required: + - compatible + - domain-name + - domain-index + +additionalProperties: false + +examples: + - | + #include <dt-bindings/power/imx8mm-power.h> + #include <dt-bindings/clock/imx8mm-clock.h> + + hsiomix_pd: power-domain-hsio { + compatible = "fsl,imx8mm-pm-domain"; + domain-index = <IMX8MM_POWER_DOMAIN_HSIOMIX>; + #power-domain-cells = <0>; + domain-name = "hsiomix"; + clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 38d823d72e52..97536afca0e1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13010,6 +13010,14 @@ L: linux-imx@xxxxxxx S: Maintained F: drivers/clk/imx/ +NXP i.MX 8M(M|N|P) POWER DOMAIN DRIVER +M: Adrien Grassein <adrien.grassein@xxxxxxxxx> +S: Maintained +F: Documentation/devicetree/bindings/power/fsl,imx-power-domain.yaml +F: include/dt-bindings/power/imx8mm-power.h +F: include/dt-bindings/power/imx8mn-power.h +F: include/dt-bindings/power/imx8mp-power.h + NXP i.MX 8MQ DCSS DRIVER M: Laurentiu Palcu <laurentiu.palcu@xxxxxxxxxxx> R: Lucas Stach <l.stach@xxxxxxxxxxxxxx> diff --git a/include/dt-bindings/power/imx8mm-power.h b/include/dt-bindings/power/imx8mm-power.h new file mode 100644 index 000000000000..bec25fd32394 --- /dev/null +++ b/include/dt-bindings/power/imx8mm-power.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ +/* + * Copyright (C) 2021 Adrien Grassein <adrien.grassein@xxxxxxxxx> + */ + +#ifndef __DT_BINDINGS_IMX8MM_POWER_H__ +#define __DT_BINDINGS_IMX8MM_POWER_H__ + +#define IMX8MM_POWER_DOMAIN_HSIOMIX 0 +#define IMX8MM_POWER_DOMAIN_PCIE1 1 +#define IMX8MM_POWER_DOMAIN_USB_OTG1 2 +#define IMX8MM_POWER_DOMAIN_USB_OTG2 3 +#define IMX8MM_POWER_DOMAIN_GPU 4 +#define IMX8MM_POWER_DOMAIN_VPU 5 +#define IMX8MM_POWER_DOMAIN_VPU_G1 6 +#define IMX8MM_POWER_DOMAIN_VPU_G2 7 +#define IMX8MM_POWER_DOMAIN_VPU_H1 8 +#define IMX8MM_POWER_DOMAIN_DISPLAY 9 +#define IMX8MM_POWER_DOMAIN_MIPI 10 + +#endif diff --git a/include/dt-bindings/power/imx8mn-power.h b/include/dt-bindings/power/imx8mn-power.h new file mode 100644 index 000000000000..dfa0711171cd --- /dev/null +++ b/include/dt-bindings/power/imx8mn-power.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ +/* + * Copyright (C) 2021 Adrien Grassein <adrien.grassein@xxxxxxxxx> + */ + +#ifndef __DT_BINDINGS_IMX8MN_POWER_H__ +#define __DT_BINDINGS_IMX8MN_POWER_H__ + +#define IMX8MN_POWER_DOMAIN_HSIOMIX 0 +#define IMX8MN_POWER_DOMAIN_USB_OTG1 2 +#define IMX8MN_POWER_DOMAIN_GPU 4 +#define IMX8MN_POWER_DOMAIN_DISPLAY 9 +#define IMX8MN_POWER_DOMAIN_MIPI 10 + +#endif diff --git a/include/dt-bindings/power/imx8mp-power.h b/include/dt-bindings/power/imx8mp-power.h new file mode 100644 index 000000000000..660e6b7d6c69 --- /dev/null +++ b/include/dt-bindings/power/imx8mp-power.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ +/* + * Copyright (C) 2021 Adrien Grassein <adrien.grassein@xxxxxxxxx> + */ + +#ifndef __DT_BINDINGS_IMX8MP_POWER_H__ +#define __DT_BINDINGS_IMX8MP_POWER_H__ + +#define IMX8MP_POWER_DOMAIN_HSIOMIX 0 +#define IMX8MP_POWER_DOMAIN_PCIE1 1 +#define IMX8MP_POWER_DOMAIN_USB_OTG1 2 +#define IMX8MP_POWER_DOMAIN_USB_OTG2 3 +#define IMX8MP_POWER_DOMAIN_MLMIX 4 +#define IMX8MP_POWER_DOMAIN_AUDIOMIX 5 +#define IMX8MP_POWER_DOMAIN_GPU_MIX 6 +#define IMX8MP_POWER_DOMAIN_GPU_2D 7 +#define IMX8MP_POWER_DOMAIN_GPU_3D 8 +#define IMX8MP_POWER_DOMAIN_VPUMIX 9 +#define IMX8MP_POWER_DOMAIN_G1 10 +#define IMX8MP_POWER_DOMAIN_G2 11 +#define IMX8MP_POWER_DOMAIN_H1 12 +#define IMX8MP_POWER_MEDIAMIX 13 +#define IMX8MP_ISP_DWP 14 +#define IMX8MP_MIPI_PHY1 15 +#define IMX8MP_MIPI_PHY2 16 +#define IMX8MP_HDMI_MIX 17 +#define IMX8MP_HDMI_PHY 18 +#endif -- 2.25.1
