Hello Adrien,
On 30.03.21 10:35, Adrien Grassein wrote:
> Add the description for the USB host port.
> At this time, the port will not work directly from the
> kernel because it's connected through a resettable hub
> that is not handle in the kernel. It should be controlled
> in the bootloader or in the userspace.
Couldn't you add a gpio-hog that gets the hub out of reset?
Cheers,
Ahmad
>
> In the case of the Boundary's u-boot, this is done on the
> boot script:
> "
> starting USB...
> Bus usb@38100000: Register 2000140 NbrPorts 2
> Starting the controller
> USB XHCI 1.10
> Bus usb@38200000: Register 2000140 NbrPorts 2
> Starting the controller
> USB XHCI 1.10
> scanning bus usb@38100000 for devices... 1 USB Device(s) found
> scanning bus usb@38200000 for devices... 3 USB Device(s) found
> "
>
> Signed-off-by: Adrien Grassein <adrien.grassein@xxxxxxxxx>
> ---
> .../boot/dts/freescale/imx8mq-nitrogen.dts | 22 +++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts b/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts
> index b46f45a82be1..7a52e247c527 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts
> @@ -213,6 +213,22 @@ &usb3_phy0 {
> status = "okay";
> };
>
> +&usb_dwc3_1 {
> + dr_mode = "host";
> + status = "okay";
> +};
> +
> +/*
> + * On this board, USB host is connected to a resettable hub.
> + * The reset signal is connected to the GPIO <&gpio1 14 GPIO_ACTIVE_LOW>.
> + * You need to activate it in the bootloader or in the userspace.
> + */
> +&usb3_phy1 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usb3_1>;
> +};
> +
> &usdhc1 {
> assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
> assigned-clock-rates = <400000000>;
> @@ -388,6 +404,12 @@ MX8MQ_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x16
> >;
> };
>
> + pinctrl_usb3_1: usb3-1grp {
> + fsl,pins = <
> + MX8MQ_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x16
> + >;
> + };
> +
> pinctrl_usdhc1: usdhc1grp {
> fsl,pins = <
> MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83
>
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