Missatge de Elaine Zhang <zhangqing@xxxxxxxxxxxxxx> del dia dv., 26 de
març 2021 a les 10:17:
>
> Use more generic names (as recommended in the device tree specification
> or the binding documentation)
>
> Signed-off-by: Elaine Zhang <zhangqing@xxxxxxxxxxxxxx>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@xxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/rockchip/px30.dtsi | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
> index c45b0cfcae09..fb3a863e0caf 100644
> --- a/arch/arm64/boot/dts/rockchip/px30.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
> @@ -247,20 +247,20 @@
> #size-cells = <0>;
>
> /* These power domains are grouped by VD_LOGIC */
> - pd_usb@PX30_PD_USB {
> + power-domain@PX30_PD_USB {
> reg = <PX30_PD_USB>;
> clocks = <&cru HCLK_HOST>,
> <&cru HCLK_OTG>,
> <&cru SCLK_OTG_ADP>;
> pm_qos = <&qos_usb_host>, <&qos_usb_otg>;
> };
> - pd_sdcard@PX30_PD_SDCARD {
> + power-domain@PX30_PD_SDCARD {
> reg = <PX30_PD_SDCARD>;
> clocks = <&cru HCLK_SDMMC>,
> <&cru SCLK_SDMMC>;
> pm_qos = <&qos_sdmmc>;
> };
> - pd_gmac@PX30_PD_GMAC {
> + power-domain@PX30_PD_GMAC {
> reg = <PX30_PD_GMAC>;
> clocks = <&cru ACLK_GMAC>,
> <&cru PCLK_GMAC>,
> @@ -268,7 +268,7 @@
> <&cru SCLK_GMAC_RX_TX>;
> pm_qos = <&qos_gmac>;
> };
> - pd_mmc_nand@PX30_PD_MMC_NAND {
> + power-domain@PX30_PD_MMC_NAND {
> reg = <PX30_PD_MMC_NAND>;
> clocks = <&cru HCLK_NANDC>,
> <&cru HCLK_EMMC>,
> @@ -281,14 +281,14 @@
> pm_qos = <&qos_emmc>, <&qos_nand>,
> <&qos_sdio>, <&qos_sfc>;
> };
> - pd_vpu@PX30_PD_VPU {
> + power-domain@PX30_PD_VPU {
> reg = <PX30_PD_VPU>;
> clocks = <&cru ACLK_VPU>,
> <&cru HCLK_VPU>,
> <&cru SCLK_CORE_VPU>;
> pm_qos = <&qos_vpu>, <&qos_vpu_r128>;
> };
> - pd_vo@PX30_PD_VO {
> + power-domain@PX30_PD_VO {
> reg = <PX30_PD_VO>;
> clocks = <&cru ACLK_RGA>,
> <&cru ACLK_VOPB>,
> @@ -304,7 +304,7 @@
> pm_qos = <&qos_rga_rd>, <&qos_rga_wr>,
> <&qos_vop_m0>, <&qos_vop_m1>;
> };
> - pd_vi@PX30_PD_VI {
> + power-domain@PX30_PD_VI {
> reg = <PX30_PD_VI>;
> clocks = <&cru ACLK_CIF>,
> <&cru ACLK_ISP>,
> @@ -315,7 +315,7 @@
> <&qos_isp_wr>, <&qos_isp_m1>,
> <&qos_vip>;
> };
> - pd_gpu@PX30_PD_GPU {
> + power-domain@PX30_PD_GPU {
> reg = <PX30_PD_GPU>;
> clocks = <&cru SCLK_GPU>;
> pm_qos = <&qos_gpu>;
> --
> 2.17.1
>
>
>
>
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