On Wed, 2021-03-24 at 11:04 -0600, Rob Herring wrote: > On Fri, Mar 12, 2021 at 12:17:02PM -0600, Robert Hancock wrote: > > Add new silabs,xaxb-ext-clk and silabs,iovdd-33 properties. > > > > Changed vdd-supply on top-level node to optional since it is not actually > > used by the driver. > > > > Removed vdd-supply from output sub-nodes, as it was not supported by the > > driver and it is not easily possible to support this in that location with > > the kernel regulator infrastructure. Changed to have vddX-supply > > attributes for each output on the top-level device node. > > > > Signed-off-by: Robert Hancock <robert.hancock@xxxxxxxxxx> > > --- > > .../devicetree/bindings/clock/silabs,si5341.txt | 16 ++++++++++------ > > 1 file changed, 10 insertions(+), 6 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/clock/silabs,si5341.txt > > b/Documentation/devicetree/bindings/clock/silabs,si5341.txt > > index 504cce3abe46..1cf7e002cb16 100644 > > --- a/Documentation/devicetree/bindings/clock/silabs,si5341.txt > > +++ b/Documentation/devicetree/bindings/clock/silabs,si5341.txt > > @@ -24,9 +24,8 @@ it. > > > > The device type, speed grade and revision are determined runtime by > > probing. > > > > -The driver currently only supports XTAL input mode, and does not support > > any > > -fancy input configurations. They can still be programmed into the chip and > > -the driver will leave them "as is". > > +The driver currently does not support any fancy input configurations. They > > can > > +still be programmed into the chip and the driver will leave them "as is". > > > > ==I2C device node== > > > > @@ -45,9 +44,9 @@ Required properties: > > corresponding to inputs. Use a fixed clock for the "xtal" input. > > At least one must be present. > > - clock-names: One of: "xtal", "in0", "in1", "in2" > > -- vdd-supply: Regulator node for VDD > > > > Optional properties: > > +- vdd-supply: Regulator node for VDD > > - vdda-supply: Regulator node for VDDA > > - vdds-supply: Regulator node for VDDS > > - silabs,pll-m-num, silabs,pll-m-den: Numerator and denominator for PLL > > @@ -60,7 +59,14 @@ Optional properties: > > be initialized, and always performs the soft-reset routine. Since this > > will > > temporarily stop all output clocks, don't do this if the chip is > > generating > > the CPU clock for example. > > +- silabs,xaxb-ext-clk: When present, indicates that the XA/XB pins are > > used > > + in EXTCLK (external reference clock) rather than XTAL (crystal) mode. > > - interrupts: Interrupt for INTRb pin. > > +- silabs,iovdd-33: When present, indicates that the I2C lines are using > > 3.3V > > + rather than 1.8V thresholds. > > How does communication over I2C to set the register for this work if the > register setting is wrong? I guess it's just leakage current... It appears the communication still works, just less optimally? From the reference manual: "The IO_VDD_SEL configuration bit optimizes the VIL, VIH, VOL,and VOH thresholds to match the VDDS voltage. By default the IO_VDD_SEL bit is set to the VDD option. The serial interface pins are always 3.3 V tolerant even when the device's VDD pin is supplied from a 1.8 V source. When the I2C or SPI host is operating at 3.3 V and the Si5340/41 at VDD = 1.8 V, the host must write the IO_VDD_SEL configuration bit to the VDDA option. This will ensure that both the host and the serial interface are operating at the optimum voltage thresholds." > > > +- vddX-supply (where X is an output index): Regulator node for VDD for the > > + specified output. The driver selects the output VDD_SEL setting based on > > this > > + voltage. > > This is called vddoX in the datasheet. Indeed, that would likely make more sense. Will update for v3. > > > - #address-cells: shall be set to 1. > > - #size-cells: shall be set to 0. > > > > @@ -77,8 +83,6 @@ Required child node properties: > > - reg: number of clock output. > > > > Optional child node properties: > > -- vdd-supply: Regulator node for VDD for this output. The driver selects > > default > > - values for common-mode and amplitude based on the voltage. > > - silabs,format: Output format, one of: > > 1 = differential (defaults to LVDS levels) > > 2 = low-power (defaults to HCSL levels) > > -- > > 2.27.0 > > -- Robert Hancock Senior Hardware Designer, Calian Advanced Technologies www.calian.com
