Re: [RFC PATCH 0/6] spi: Add OSPI PHY calibration support for spi-cadence-quadspi

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Am 2021-03-12 12:07, schrieb Pratyush Yadav:
On 12/03/21 11:20AM, Michael Walle wrote:
Am 2021-03-12 11:10, schrieb Pratyush Yadav:
> There is usually a delay from when the flash drives the data line (IOW,
> puts a data bit on it) and when the signal reaches the controller. This
> delay can vary by the flash, board, silicon characteristics,
> temperature, etc.

Temperature might change over time, but the calibration is only done
once. I don't know how much influence the temperature actually has, but our boards are usually operating from -40°C to +85°C. So there might be a possible temperature difference of 125K between actual calibration and
when the flash is accessed.

The algorithm supports a temperature range of -45 C to +130 C. The
temperature is checked at calibration time and adjustments are made to
make sure the reads work over the entire temperature range [0].

Ah, nice. And you need the current temperature to correlate it to the
meassured timings, right?

-michael



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