[kbuild] Re: [PATCH 3/3] pinctrl: Ingenic: Add support for new Ingenic SoCs.

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Hi "周琰杰,

url:    https://github.com/0day-ci/linux/commits/Zhou-Yanjie/Fix-bugs-and-add-support-for-new-Ingenic-SoCs/20210310-004336 
base:   https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git  devel
config: microblaze-randconfig-m031-20210308 (attached as .config)
compiler: microblaze-linux-gcc (GCC) 9.3.0

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>
Reported-by: Dan Carpenter <dan.carpenter@xxxxxxxxxx>

smatch warnings:
drivers/pinctrl/pinctrl-ingenic.c:2829 irq_set_type() error: uninitialized symbol 'val3'.

vim +/val3 +2829 drivers/pinctrl/pinctrl-ingenic.c

e72394e2ea196a Paul Cercueil        2018-08-21  2782  static void irq_set_type(struct ingenic_gpio_chip *jzgc,
e72394e2ea196a Paul Cercueil        2018-08-21  2783  		u8 offset, unsigned int type)
e72394e2ea196a Paul Cercueil        2018-08-21  2784  {
e72394e2ea196a Paul Cercueil        2018-08-21  2785  	u8 reg1, reg2;
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2786) 	bool val1, val2, val3;
e72394e2ea196a Paul Cercueil        2018-08-21  2787  
e72394e2ea196a Paul Cercueil        2018-08-21  2788  	switch (type) {
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2789) 	case IRQ_TYPE_EDGE_BOTH:
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2790) 		val1 = val2 = false;
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2791) 		val3 = true;
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2792) 		break;
e72394e2ea196a Paul Cercueil        2018-08-21  2793  	case IRQ_TYPE_EDGE_RISING:
f831f93af67658 Paul Cercueil        2020-01-07  2794  		val1 = val2 = true;
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2795) 		val3 = false;
e72394e2ea196a Paul Cercueil        2018-08-21  2796  		break;
e72394e2ea196a Paul Cercueil        2018-08-21  2797  	case IRQ_TYPE_EDGE_FALLING:
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2798) 		val1 = val3 = false;
f831f93af67658 Paul Cercueil        2020-01-07  2799  		val2 = true;
e72394e2ea196a Paul Cercueil        2018-08-21  2800  		break;
e72394e2ea196a Paul Cercueil        2018-08-21  2801  	case IRQ_TYPE_LEVEL_HIGH:
f831f93af67658 Paul Cercueil        2020-01-07  2802  		val1 = true;
f831f93af67658 Paul Cercueil        2020-01-07  2803  		val2 = false;
e72394e2ea196a Paul Cercueil        2018-08-21  2804  		break;
e72394e2ea196a Paul Cercueil        2018-08-21  2805  	case IRQ_TYPE_LEVEL_LOW:
e72394e2ea196a Paul Cercueil        2018-08-21  2806  	default:
f831f93af67658 Paul Cercueil        2020-01-07  2807  		val1 = val2 = false;

val3 not set for IRQ_TYPE_LEVEL_LOW/HIGH and default.

f831f93af67658 Paul Cercueil        2020-01-07  2808  		break;
f831f93af67658 Paul Cercueil        2020-01-07  2809  	}
f831f93af67658 Paul Cercueil        2020-01-07  2810  
9a85c09a3f507b Paul Cercueil        2020-12-11  2811  	if (jzgc->jzpc->info->version >= ID_JZ4770) {
b4aa4876e58d12 Paul Cercueil        2020-12-11  2812  		reg1 = JZ4770_GPIO_PAT1;
b4aa4876e58d12 Paul Cercueil        2020-12-11  2813  		reg2 = JZ4770_GPIO_PAT0;
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2814) 	} else if (jzgc->jzpc->info->version >= ID_JZ4740) {
f831f93af67658 Paul Cercueil        2020-01-07  2815  		reg1 = JZ4740_GPIO_TRIG;
f831f93af67658 Paul Cercueil        2020-01-07  2816  		reg2 = JZ4740_GPIO_DIR;
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2817) 	} else {
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2818) 		ingenic_gpio_set_bit(jzgc, JZ4730_GPIO_GPDIR, offset, false);
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2819) 		ingenic_gpio_set_bits(jzgc, JZ4730_GPIO_GPIDUR,
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2820) 					JZ4730_GPIO_GPIDLR, offset,
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2821) 					(val2 ? 2 : 0) | (val1 ? 1 : 0));
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2822) 		return;
f831f93af67658 Paul Cercueil        2020-01-07  2823  	}
f831f93af67658 Paul Cercueil        2020-01-07  2824  
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2825) 	if (jzgc->jzpc->info->version >= ID_X2000) {
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2826) 		ingenic_gpio_shadow_set_bit(jzgc, reg2, offset, val1);
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2827) 		ingenic_gpio_shadow_set_bit(jzgc, reg1, offset, val2);
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2828) 		ingenic_gpio_shadow_set_bit_load(jzgc);
8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10 @2829) 		ingenic_gpio_set_bit(jzgc, X2000_GPIO_EDG, offset, val3);
                                                                                                                   ^^^^

8ccc76e91d8769 周琰杰 (Zhou Yanjie  2021-03-10  2830) 	} else if (jzgc->jzpc->info->version >= ID_X1000) {
f831f93af67658 Paul Cercueil        2020-01-07  2831  		ingenic_gpio_shadow_set_bit(jzgc, reg2, offset, val1);
f831f93af67658 Paul Cercueil        2020-01-07  2832  		ingenic_gpio_shadow_set_bit(jzgc, reg1, offset, val2);
fe1ad5eedc916b Zhou Yanjie          2019-07-14  2833  		ingenic_gpio_shadow_set_bit_load(jzgc);
fe1ad5eedc916b Zhou Yanjie          2019-07-14  2834  	} else {
f831f93af67658 Paul Cercueil        2020-01-07  2835  		ingenic_gpio_set_bit(jzgc, reg2, offset, val1);
f831f93af67658 Paul Cercueil        2020-01-07  2836  		ingenic_gpio_set_bit(jzgc, reg1, offset, val2);
e72394e2ea196a Paul Cercueil        2018-08-21  2837  	}
e72394e2ea196a Paul Cercueil        2018-08-21  2838  }

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx 

Attachment: .config.gz
Description: application/gzip

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