On 3/9/21 8:38 AM, Daniel Lezcano wrote: > From: Enric Balletbo i Serra <enric.balletbo@xxxxxxxxxxxxx> > > The Rockchip DMC (Dynamic Memory Interface) needs to access to the PMU > general register files to know the DRAM type, so add a phandle to the > syscon that manages these registers. > > Signed-off-by: Enric Balletbo i Serra <enric.balletbo@xxxxxxxxxxxxx> > Reviewed-by: Chanwoo Choi <cw00.choi@xxxxxxxxxxx> > Acked-by: Rob Herring <robh@xxxxxxxxxx> > Signed-off-by: Gaël PORTAY <gael.portay@xxxxxxxxxxxxx> > Acked-by: MyungJoo Ham <myungjoo.ham@xxxxxxxxxxx> > Signed-off-by: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx> > --- > Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt > index a10d1f6d85c6..a41bcfef95c8 100644 > --- a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt > +++ b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt > @@ -12,6 +12,8 @@ Required properties: > for details. > - center-supply: DMC supply node. > - status: Marks the node enabled/disabled. > +- rockchip,pmu: Phandle to the syscon managing the "PMU general register > + files". > > Optional properties: > - interrupts: The CPU interrupt number. The interrupt specifier > Applied it. Thanks. -- Best Regards, Chanwoo Choi Samsung Electronics