On Fri, Feb 12, 2021 at 02:22:34PM -0800, mgross@xxxxxxxxxxxxxxx wrote: > From: Daniele Alessandrelli <daniele.alessandrelli@xxxxxxxxx> > > Add DT binding documentation for the Intel Keem Bay IPC driver, which Bindings are for h/w blocks, not drivers. From a binding perspective, I don't really care what the driver architecture for some OS looks like. I continue to not understand what this h/w looks like. A block diagram would help as would understanding what blocks have multiple clients (mailboxes and xlink in particular). > enables communication between the Computing Sub-System (CSS) and the > Multimedia Sub-System (MSS) of the Intel Movidius SoC code named Keem > Bay. > > Cc: Rob Herring <robh+dt@xxxxxxxxxx> > Cc: devicetree@xxxxxxxxxxxxxxx > Reviewed-by: Mark Gross <mgross@xxxxxxxxxxxxxxx> > Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@xxxxxxxxx> > Signed-off-by: Mark Gross <mgross@xxxxxxxxxxxxxxx> > --- > .../bindings/soc/intel/intel,keembay-ipc.yaml | 45 +++++++++++++++++++ > 1 file changed, 45 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml > > diff --git a/Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml b/Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml > new file mode 100644 > index 000000000000..586fe73f4cd4 > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml > @@ -0,0 +1,45 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright (C) 2020 Intel Corporation > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/soc/intel/intel,keembay-ipc.yaml#"; > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"; > + > +title: Keem Bay IPC > + > +maintainers: > + - Daniele Alessandrelli <daniele.alessandrelli@xxxxxxxxx> > + > +description: > + The Keem Bay IPC driver enables Inter-Processor Communication (IPC) with the > + Visual Processor Unit (VPU) embedded in the Intel Movidius SoC code named > + Keem Bay. > + > +properties: > + compatible: > + const: intel,keembay-ipc > + > + memory-region: > + items: > + - description: > + Reserved memory region used by the CPU to allocate IPC packets. > + - description: > + Reserved memory region used by the VPU to allocate IPC packets. > + > + mboxes: > + description: VPU IPC Mailbox. > + > +required: > + - compatible > + - memory-region > + - mboxes > + > +additionalProperties: false > + > +examples: > + - | > + ipc { > + compatible = "intel,keembay-ipc"; > + memory-region = <&ipc_cpu_reserved>, <&ipc_vpu_reserved>; > + mboxes = <&vpu_ipc_mbox 0>; > + }; > -- > 2.17.1 >
