Hi Brian,
On Mon, 7 Jul 2014 16:52:22 -0700
Brian Norris <computersforpeace@xxxxxxxxx> wrote:
> Hi Boris,
>
> On Thu, Jul 03, 2014 at 10:05:22AM +0200, Boris BREZILLON wrote:
> > On Wed, 2 Jul 2014 17:22:37 -0700 Brian Norris <computersforpeace@xxxxxxxxx> wrote:
> > > On Wed, May 28, 2014 at 10:20:05AM +0100, Lee Jones wrote:
> > > > +
> > > > + nand_timing0: nand-timing {
> > > > + sig-setup = <10>;
> > > > + sig-hold = <10>;
> > > > + CE-deassert = <0>;
> > > > + WE-to-RBn = <100>;
> > > > + wr-on = <10>;
> > > > + wr-off = <30>;
> > > > + rd-on = <10>;
> > > > + rd-off = <30>;
> > > > + chip-delay = <30>; /* delay in us */
> > > > + };
> > >
> > > You didn't document any of this node. And I don't think we want to
> > > specify every single timing parameter in DT; it may make sense to use
> > > Boris Brezillon's approach (I note this further down, in the driver
> > > code) for mapping non-ONFI NAND timings into a compatible ONFI timing
> > > mode. This will greatly simplify the bindings needed, since it's
> > > standardized and auto-detectable in many cases.
> >
> >
> > AFAIR, the NAND timing representation for non-ONFI chips question was
> > left unanswered:
> >
> > https://lkml.org/lkml/2014/5/20/581
> >
> > I can definitely respin my NAND timings series, but I'd like to be sure
> > this is how you want it done before doing so.
>
> Can we start by supporting ONFI-only (or ONFI-only, plus entries in
> nand_flash_ids[]), and have nand_base provide the translation so drivers
> can retrieve the info? Then we can begin supporting new drivers like
> Lee's, and worry about the DT question separately.
So, basically, I just send a new series with patch 1 and 2 from my sunxi
NAND series [1] (including the fixes you suggested, of course), right ?
[1] http://thread.gmane.org/gmane.comp.hardware.netbook.arm.sunxi/7977
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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