Add DDR EMI provider dictating dram interconnect bus performance found on
MT8192-based platforms
Signed-off-by: Henry Chen <henryc.chen@xxxxxxxxxxxx>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 062afe8..e862078 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -7,6 +7,7 @@
#include <dt-bindings/clock/mt8183-clk.h>
#include <dt-bindings/gce/mt8173-gce.h>
+#include <dt-bindings/interconnect/mtk,mt8183-emi.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/memory/mt8183-larb-port.h>
@@ -500,6 +501,7 @@
ddr_emi: dvfsrc@10012000 {
compatible = "mediatek,mt8183-dvfsrc";
reg = <0 0x10012000 0 0x1000>;
+ #interconnect-cells = <1>;
};
pwrap: pwrap@1000d000 {
--
1.9.1
