In general pinconf belongs in board files, not SoC files. Move it to
the only current user (trogdor). Also adjust the drive strengths and
pulls.
Cc: V Sujith Kumar Reddy <vsujithk@xxxxxxxxxxxxxx>
Cc: Srinivasa Rao Mandadapu <srivasam@xxxxxxxxxxxxxx>
Cc: Tzung-Bi Shih <tzungbi@xxxxxxxxxxxx>
Cc: Judy Hsiao <judyhsiao@xxxxxxxxxxxx>
Signed-off-by: Douglas Anderson <dianders@xxxxxxxxxxxx>
Reviewed-by: Matthias Kaehlcke <mka@xxxxxxxxxxxx>
---
This should replace the patch ("Asoc: qcom: dts: Change MI2S GPIO
configuration to pulldown") [1].
It can also be noted that on future SoCs we won't have the separate
pinconf/pinmux nodes but we're not there yet on sc7180 [2].
[1] https://lore.kernel.org/r/1605526408-15671-1-git-send-email-srivasam@xxxxxxxxxxxxxx
[2] https://lore.kernel.org/r/CAD=FV=WhjvqUau_Jz9ZLFukGUxRqGJTJN+sUt=yv2Q81FRzUWQ@xxxxxxxxxxxxxx
(no changes since v1)
arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 24 ++++++++++++++++++++
arch/arm64/boot/dts/qcom/sc7180.dtsi | 18 ---------------
2 files changed, 24 insertions(+), 18 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
index 58e127b6ba1e..47eed134c733 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
@@ -877,6 +877,22 @@ pinconf {
};
};
+&pri_mi2s_active {
+ pinconf {
+ pins = "gpio53", "gpio54", "gpio55", "gpio56";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
+&pri_mi2s_mclk_active {
+ pinconf {
+ pins = "gpio57";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
&qspi_cs0 {
pinconf {
pins = "gpio68";
@@ -1017,6 +1033,14 @@ pinconf-rx {
};
};
+&sec_mi2s_active {
+ pinconf {
+ pins = "gpio49", "gpio50", "gpio51";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
/* PINCTRL - board-specific pinctrl */
&pm6150_gpio {
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 60248a6757d8..5040923a9f7c 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -1856,12 +1856,6 @@ pinmux {
pins = "gpio49", "gpio50", "gpio51";
function = "mi2s_1";
};
-
- pinconf {
- pins = "gpio49", "gpio50", "gpio51";
- drive-strength = <8>;
- bias-pull-up;
- };
};
pri_mi2s_active: pri-mi2s-active {
@@ -1869,12 +1863,6 @@ pinmux {
pins = "gpio53", "gpio54", "gpio55", "gpio56";
function = "mi2s_0";
};
-
- pinconf {
- pins = "gpio53", "gpio54", "gpio55", "gpio56";
- drive-strength = <8>;
- bias-pull-up;
- };
};
pri_mi2s_mclk_active: pri-mi2s-mclk-active {
@@ -1882,12 +1870,6 @@ pinmux {
pins = "gpio57";
function = "lpass_ext";
};
-
- pinconf {
- pins = "gpio57";
- drive-strength = <8>;
- bias-pull-up;
- };
};
sdc1_on: sdc1-on {
--
2.30.1.766.gb4fecdf3b7-goog
