On 16/02/2021 04.29, Krzysztof Kozlowski wrote:
On Mon, Feb 15, 2021 at 09:17:13PM +0900, Hector Martin wrote:
+ memory@800000000 {
+ device_type = "memory";
+ reg = <0 0 0 0>; /* To be filled by loader */
dtc and dtschema might complain, so could you set here fake memory
address 0x800000000? Would that work for your bootloader?
Yeah, the bootloader just replaces the entire property anyway. I'll fill
in some dummy values (the real usable memory range is to some extent
dynamic and depends on firmware).
+ };
+};
+
+&serial0 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/apple/apple-m1.dtsi b/arch/arm64/boot/dts/apple/apple-m1.dtsi
new file mode 100644
index 000000000000..45c87771b057
--- /dev/null
+++ b/arch/arm64/boot/dts/apple/apple-m1.dtsi
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Copyright The Asahi Linux Contributors
+ */
+
+#include <dt-bindings/interrupt-controller/apple-aic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+ compatible = "apple,m1", "apple,arm-platform";
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ compatible = "apple,icestorm";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>; /* To be filled by loader */
+ };
New line after every device node, please.
Added newlines after all the CPU nodes.
With this minor changes, fine for me:
Reviewed-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
Thanks!
v3 will rename this file to apple/t8103.dtsi and the board file to
t8103-j274.dts to better match other platforms (and to use the proper
SoC ID for the M1); please let me know if you're okay keeping the
Reviewed-by for that.
--
Hector Martin (marcan@xxxxxxxxx)
Public Key: https://mrcn.st/pub
