On Mon, 08 Feb 2021 12:46:58 +0100, Amelie Delaunay wrote: > usbphyc provides a unique clock called ck_usbo_48m. > STM32 USB OTG needs a 48Mhz clock (utmifs_clk48) for Full-Speed operation. > ck_usbo_48m is a possible parent clock for USB OTG 48Mhz clock. > > ck_usbo_48m is available as soon as the PLL is enabled. > > Signed-off-by: Amelie Delaunay <amelie.delaunay@xxxxxxxxxxx> > --- > Changes in v3: > - remove #clock-cells from required properties > --- > Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > Acked-by: Rob Herring <robh@xxxxxxxxxx>
