On Mon, 18 Jan 2021 09:41:52 +0530, Manivannan Sadhasivam wrote: > Add devicetree YAML binding for SDX55 APCS GCC block. The APCS block > acts as the mailbox controller and also provides a clock output and > takes 3 clock sources (pll, aux, ref) as input. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> > --- > .../mailbox/qcom,apcs-kpss-global.yaml | 33 +++++++++++++++++++ > 1 file changed, 33 insertions(+) > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
