Hello, Russell,
I agree that this patch needs rework.
I will definitely do it and issue a new version.
> On Wed, Feb 03, 2021 at 02:50:45PM +0000, Kostya Porotchkin wrote:
> > [KP] So for older systems this "slow mode" parameter could be set on the
> board level.
> > When it is set in ap80x,dtsi file it downgrades all systems to HS-SDR52, even
> if they support HS400 on AP side.
> > MacchiatoBIN AP eMMC is connected to 3.3v regulator and has "no-1-8-v"
> flag set, so it should remain in low speed anyway.
>
> Your reasoning does not make sense.
>
> The ap80x.dtsi file does not specify "marvell,xenon-phy-slow-mode".
> It is not specified at this level. It is already specified at board level.
[KP] it does. In current armada-ap80x.dtsi File this specification is on row 260:
ap_sdhci0: sdhci@6e0000 {
compatible = "marvell,armada-ap806-sdhci";
reg = <0x6e0000 0x300>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "core";
clocks = <&ap_clk 4>;
dma-coherent;
marvell,xenon-phy-slow-mode;
status = "disabled";
};
So I would like to remove this row.
> Given that Macchiatobin will still use slow mode, why remove the
> marvell,xenon-phy-slow-mode property from this file?
[KP] Agree, I will keep this property in Macchiatobin DTS file.
>
> Also, if you're upgrading ap80x.dtsi to use a bus-width of 8, why keep the bus-
> width specifier of 8 in the board files?
[KP] The bus width is updated in A8040 DB DTS. This board utilizes 8-bit interface.
The armada-ap80x.dtsi file does not specifies the bus width since it is board-specific.
>
> This patch just doesn't make sense, and your responses to our points seem to
> add to the confusion.
[KP] I am sorry about it. Hope my last response clarifies it.
Kosta
>
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