On Fri, Jan 29, 2021 at 4:56 PM Gregory CLEMENT <gregory.clement@xxxxxxxxxxx> wrote: > > Hello Bartosz, > > > On Mon, Jan 11, 2021 at 12:47 PM Baruch Siach <baruch@xxxxxxxxxx> wrote: > >> > >> The 'marvell,pwm-offset' property of both GPIO blocks (per CP component) > >> point to the same counter registers offset. The driver will decide how > >> to use counters A/B. > >> > >> This is different from the convention of pwm on earlier Armada series > >> (370/38x). On those systems the assignment of A/B counters to GPIO > >> blocks is coded in both DT and the driver. The actual behaviour of the > >> current driver on Armada 8K/7K is the same as earlier systems. > >> > >> Add also clock properties for base pwm frequency reference. > >> > >> Signed-off-by: Baruch Siach <baruch@xxxxxxxxxx> > >> --- > > > > Andrew, Gregory, Sebastian, > > > > Can we get your Acks on this patch? Are you fine with it going through > > the GPIO tree? > > I prefer applying it on our tree to avoid merge conflicts. > > Gregory Ok, I applied the remaining patches from this series. Bartosz
