On Sat, Jan 9, 2021 at 6:47 AM AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxxx> wrote: > > This clock enables the GPLL0 output to the multimedia subsystem > clock controller. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxxx> Any reason why you are not also adding the div_clk?