On Fri, 08 Jan 2021 17:02:31 +0530, Manivannan Sadhasivam wrote: > Add devicetree YAML binding for Cortex A7 PLL clock in Qualcomm > platforms like SDX55. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> > --- > .../devicetree/bindings/clock/qcom,a7pll.yaml | 51 +++++++++++++++++++ > 1 file changed, 51 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,a7pll.yaml > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
