On Wed, Dec 23, 2020 at 04:33:02PM +0000, conor.dooley@xxxxxxxxxxxxx wrote: > From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > > Add device tree bindings for the MSS system controller mailbox on > the Microchip PolarFire SoC. > > Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > --- [...] > + reg: > + items: > + - description: mailbox data registers > + - description: mailbox int registers Does "int registers" mean "interrupt registers", i.e. do they control some aspect of interrupt delivery? IMHO, it would be good to spell it out, because "int" could mean different things. Best regards, happy new year, Jonathan Neuschäfer
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