On Thu, Dec 17, 2020 at 05:59:25PM +0800, Liu Ying wrote: > This patch adds bindings for i.MX8qm/qxp display pixel link. > > Signed-off-by: Liu Ying <victor.liu@xxxxxxx> > --- > .../display/bridge/fsl,imx8qxp-pixel-link.yaml | 128 +++++++++++++++++++++ > 1 file changed, 128 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml > > diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml > new file mode 100644 > index 00000000..fd24a0e > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml > @@ -0,0 +1,128 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale i.MX8qm/qxp Display Pixel Link > + > +maintainers: > + - Liu Ying <victor.liu@xxxxxxx> > + > +description: | > + The Freescale i.MX8qm/qxp Display Pixel Link(DPL) forms a standard > + asynchronous linkage between pixel sources(display controller or > + camera module) and pixel consumers(imaging or displays). > + It consists of two distinct functions, a pixel transfer function and a > + control interface. Multiple pixel channels can exist per one control channel. > + This binding documentation is only for pixel links whose pixel sources are > + display controllers. Perhaps some information about how this 'device' is accessed because you have no control interface. > + > +properties: > + compatible: > + enum: > + - fsl,imx8qm-dc-pixel-link > + - fsl,imx8qxp-dc-pixel-link > + > + ports: > + type: object > + description: | > + A node containing pixel link input & output port nodes with endpoint > + definitions as documented in > + Documentation/devicetree/bindings/media/video-interfaces.txt > + Documentation/devicetree/bindings/graph.txt > + > + properties: > + '#address-cells': > + const: 1 > + > + '#size-cells': > + const: 0 > + > + port@0: > + type: object > + description: The pixel link input port node from upstream video source. > + > + properties: > + reg: > + const: 0 > + > + required: > + - reg You can drop 'reg' parts. > + > + patternProperties: > + "^port@[1-4]$": > + type: object > + description: The pixel link output port node to downstream bridge. > + > + properties: > + reg: > + enum: [ 1, 2, 3, 4 ] > + > + required: > + - reg > + > + required: > + - "#address-cells" > + - "#size-cells" > + - port@0 > + > + anyOf: > + - required: > + - port@1 > + - required: > + - port@2 > + - required: > + - port@3 > + - required: > + - port@4 > + > + additionalProperties: false > + > +required: > + - compatible > + - ports > + > +additionalProperties: false > + > +examples: > + - | > + dc0-pixel-link0 { > + compatible = "fsl,imx8qxp-dc-pixel-link"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + /* from dc0 pixel combiner channel0 */ > + port@0 { > + reg = <0>; > + > + dc0_pixel_link0_dc0_pixel_combiner_ch0: endpoint { > + remote-endpoint = <&dc0_pixel_combiner_ch0_dc0_pixel_link0>; > + }; > + }; > + > + /* to PXL2DPIs in MIPI/LVDS combo subsystems */ > + port@1 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <1>; > + > + dc0_pixel_link0_mipi_lvds_0_pxl2dpi: endpoint@0 { > + reg = <0>; > + remote-endpoint = <&mipi_lvds_0_pxl2dpi_dc0_pixel_link0>; > + }; > + > + dc0_pixel_link0_mipi_lvds_1_pxl2dpi: endpoint@1 { > + reg = <1>; > + remote-endpoint = <&mipi_lvds_1_pxl2dpi_dc0_pixel_link0>; > + }; > + }; > + > + /* to imaging subsystem */ > + port@4 { > + reg = <4>; > + }; > + }; > + }; > -- > 2.7.4 >
