On Thu, Dec 17, 2020 at 11:50 AM Stephen Boyd <sboyd@xxxxxxxxxx> wrote:
>
> Quoting Sergio Paracuellos (2020-12-17 02:38:37)
> > On Thu, Dec 17, 2020 at 11:32 AM Stephen Boyd <sboyd@xxxxxxxxxx> wrote:
> > >
> > > Quoting Sergio Paracuellos (2020-12-17 02:14:10)
> > > > node is to use architecture operations in
> > > > 'arch/mips/include/asm/mach-ralink/ralink_regs.h'
> > > > instead of getting a phandle using the regmap is being currently used...
> > >
> > > Can that be done with
> > >
> > > CLK_OF_DECLARE_DRIVER("mediatek,mt7621-sysc", my_timer_clk_init)
> > >
> > > ? Is the syscon used anywhere besides by the clk driver?
> >
> > Yes, for example all the gates use them to access SYSC_REG_CLKCFG1 in
> > all of their 'mt7621_gate_ops' and also in all 'recalc_rate' functions
> > where SYSC_REG_SYSTEM_CONFIG0, is readed.
>
> That sounds like it's only used by the clk provider/driver? Any other
> code uses the syscon?
The only child node for the syscon for this platform is the clock
driver now, I introduced it in this series, so no other driver is
using this syscon now. All of them use global arch operations in
'arch/mips/include/asm/mach-ralink/ralink_regs.h'.
