On Mon, 30 Nov 2020 18:15:05 +0800, Biwen Li wrote:
> Add an new IRQ chip declaration for LS1043A and LS1088A
> - compatible "fsl,ls1043a-extirq" for LS1043A, LS1046A.
> - compatible "fsl,ls1088a-extirq" for LS1088A, LS208xA, LX216xA.
> - get mask value directly according to compatible property of DT
> and remove confused code(bit_reverse field of struct ls_extirq_data,
> no need this field for SoC LS1021A. Because the register
> LS1021A_SCFGREVCR is initialized to 0xffffffff by the relative rcw)
Applied to irq/irqchip-next, thanks!
[01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt
commit: b16a1caf4686895427c810219d4b2f796e676160
[11/11] dt-bindings: interrupt-controller: update bindings for supporting more SoCs
commit: 9898a59358d7cb925f63bb77bd40224d1bc4857e
Patches 2-10 should be routed via the SoC tree.
Cheers,
M.
--
Without deviation from the norm, progress is not possible.
