v5->v6: 1. Drop #size-cells and #address-cell in the hisilicon,hi3559av100-clock.yaml 2. Add discription for #reset-cells in the hisilicon,hi3559av100-clock.yaml 3. Remove #clock-cells in hisilicon,hiedmacv310.yaml 4. Merge property misc_ctrl_base and misc_regmap together for hiedmacv310 driver v4->v5: 1. change the patch author mail name v3->v4: 1. fix the 'make dt_binding_check' issues. 2. Combine the 'Enable HiSilicon Hiedma Controller' series patches to this series. 3. fix the 'make dt_binding_check' issues in 'Enable HiSilicon Hiedma Controller' patchset v2->v3: 1. change dt-bindings documents from txt to yaml format. 2. Add SHUB clock to access the devices of m7 Dongjiu Geng (4): dt-bindings: Document the hi3559a clock bindings clk: hisilicon: Add clock driver for hi3559A SoC dt: bindings: dma: Add DT bindings for HiSilicon Hiedma Controller dmaengine: dma: Add Hiedma Controller v310 Device Driver .../clock/hisilicon,hi3559av100-clock.yaml | 59 + .../bindings/dma/hisilicon,hiedmacv310.yaml | 94 ++ drivers/clk/hisilicon/Kconfig | 7 + drivers/clk/hisilicon/Makefile | 1 + drivers/clk/hisilicon/clk-hi3559a.c | 865 ++++++++++ drivers/dma/Kconfig | 14 + drivers/dma/Makefile | 1 + drivers/dma/hiedmacv310.c | 1442 +++++++++++++++++ drivers/dma/hiedmacv310.h | 136 ++ include/dt-bindings/clock/hi3559av100-clock.h | 165 ++ 10 files changed, 2784 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/hisilicon,hi3559av100-clock.yaml create mode 100644 Documentation/devicetree/bindings/dma/hisilicon,hiedmacv310.yaml create mode 100644 drivers/clk/hisilicon/clk-hi3559a.c create mode 100644 drivers/dma/hiedmacv310.c create mode 100644 drivers/dma/hiedmacv310.h create mode 100644 include/dt-bindings/clock/hi3559av100-clock.h -- 2.17.1
