On Tue, Oct 27, 2020 at 10:30:28PM +0530, Manivannan Sadhasivam wrote:
> Hello,
>
> This series adds PCIe support for Qualcomm SM8250 SoC with relevant PHYs.
> There are 3 PCIe instances on this SoC each with different PHYs. The PCIe
> controller and PHYs are mostly comaptible with the ones found on SDM845
> SoC, hence the old drivers are modified to add the support.
>
> This series has been tested on RB5 board with QCA6391 chipset connected
> onboard.
Hi,
I would be merging this series, I understand patch {2) was already
taken by Vinod - should I take {1,3,4,5} via the pci tree ?
Thanks,
Lorenzo
> Thanks,
> Mani
>
> Changes in v5:
>
> * Added Review tags from Rob
> * Cleaned up the bdf to sid patch after discussing with Tony
>
> Changes in v4:
>
> * Fixed an issue with tx_tbl_sec in PHY driver
>
> Changes in v3:
>
> * Rebased on top of phy/next
> * Renamed ops_sm8250 to ops_1_9_0 to maintain uniformity
>
> Changes in v2:
>
> * Fixed the PHY and PCIe bindings
> * Introduced secondary table in PHY driver to abstract out the common configs.
> * Used a more generic way of configuring BDF to SID mapping
> * Dropped ATU change in favor of a patch spotted by Rob
>
> Manivannan Sadhasivam (5):
> dt-bindings: phy: qcom,qmp: Add SM8250 PCIe PHY bindings
> phy: qcom-qmp: Add SM8250 PCIe QMP PHYs
> dt-bindings: pci: qcom: Document PCIe bindings for SM8250 SoC
> PCI: qcom: Add SM8250 SoC support
> PCI: qcom: Add support for configuring BDF to SID mapping for SM8250
>
> .../devicetree/bindings/pci/qcom,pcie.txt | 6 +-
> .../devicetree/bindings/phy/qcom,qmp-phy.yaml | 6 +
> drivers/pci/controller/dwc/Kconfig | 1 +
> drivers/pci/controller/dwc/pcie-qcom.c | 92 ++++++
> drivers/phy/qualcomm/phy-qcom-qmp.c | 281 +++++++++++++++++-
> drivers/phy/qualcomm/phy-qcom-qmp.h | 18 ++
> 6 files changed, 398 insertions(+), 6 deletions(-)
>
> --
> 2.17.1
>
