On Wed, Dec 2, 2020 at 8:15 AM Baruch Siach <baruch@xxxxxxxxxx> wrote: > > The gpio-mvebu driver supports the PWM functionality of the GPIO block for > earlier Armada variants like XP, 370 and 38x. This series extends support to > newer Armada variants that use CP11x and AP80x, like Armada 8K and 7K. > > This series adds adds the 'pwm-offset' property to DT binding. 'pwm-offset' > points to the base of A/B counter registers that determine the PWM period and > duty cycle. > > The existing PWM DT binding reflects an arbitrary decision to allocate the A > counter to the first GPIO block, and B counter to the other one. In attempt to > provide better future flexibility, the new 'pwm-offset' property always points > to the base address of both A/B counters. The driver code still allocates the > counters in the same way, but this might change in the future with no change to > the DT. > > Tested AP806 and CP110 (both) on Armada 8040 based system. > > I marked this series as v3 to avoid confusion about the probe resource leak > fix that I posted in a separate patch. The (improved) fix is now patch #1 in > this series. That is the only change in v3. > > Baruch Siach (6): > gpio: mvebu: fix potential user-after-free on probe > gpio: mvebu: update Armada XP per-CPU comment > gpio: mvebu: switch pwm duration registers to regmap > gpio: mvebu: add pwm support for Armada 8K/7K > arm64: dts: armada: add pwm offsets for ap/cp gpios > dt-bindings: ap806: document gpio pwm-offset property > > .../arm/marvell/ap80x-system-controller.txt | 8 + > arch/arm64/boot/dts/marvell/armada-ap80x.dtsi | 3 + > arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 10 ++ > drivers/gpio/gpio-mvebu.c | 170 +++++++++++------- > 4 files changed, 128 insertions(+), 63 deletions(-) > > -- > 2.29.2 > I applied the first three patches. For the last three - you'll need to resend them with Rob Herring in Cc for an ack on the new property. Bartosz
