Tushar, On Tue, Jun 10, 2014 at 10:32 PM, Tushar Behera <tushar.b@xxxxxxxxxxx> wrote: > Currently CLK_FOUT_EPLL was set as one of the parents of AUDSS mux. > As per the user manual, it should be CLK_MAU_EPLL. > > The problem surfaced when the bootloader in Peach-pit board set > the EPLL clock as the parent of AUDSS mux. While booting the kernel, > we used to get a system hang during late boot if CLK_MAU_EPLL was > disabled. > > Signed-off-by: Tushar Behera <tushar.b@xxxxxxxxxxx> > Signed-off-by: Shaik Ameer Basha <shaik.ameer@xxxxxxxxxxx> > Reported-by: Kevin Hilman <khilman@xxxxxxxxxx> > --- > arch/arm/boot/dts/exynos5420.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) I've tested this myself now as well. Tested-by: Doug Anderson <dianders@xxxxxxxxxxxx> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
