On 19/11/2020 18.10, Vignesh Raghavendra wrote:
>
>
> On 11/19/20 6:56 PM, Peter Ujfalusi wrote:
>> J7200 main_i2c1 is connected to the i2c bus on the CPB marked as main_i2c3
>>
>> The i2c1 devices on the CPB are _not_ connected to the SoC, they are not
>> usable with the J7200 SOM.
>>
>> Correct the expander name from exp4 to exp3 and at the same time add the
>> line names as well.
>>
>> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@xxxxxx>
>> ---
>
> Yes, the schematics call this expander as exp3. Thanks for the fix
The CPB is the same for both j721e and j7200 SOMs.
I'll send v2 with a small comment block to explain this.
> Reviewed-by: Vignesh Raghavendra <vigneshr@xxxxxx>
>
>> arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 5 ++++-
>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>> index 2721137d8943..83e043c65f81 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>> @@ -159,11 +159,14 @@ &main_i2c1 {
>> pinctrl-0 = <&main_i2c1_pins_default>;
>> clock-frequency = <400000>;
>>
>> - exp4: gpio@20 {
>> + exp3: gpio@20 {
>> compatible = "ti,tca6408";
>> reg = <0x20>;
>> gpio-controller;
>> #gpio-cells = <2>;
>> + gpio-line-names = "CODEC_RSTz", "CODEC_SPARE1", "UB926_RESETn",
>> + "UB926_LOCK", "UB926_PWR_SW_CNTRL",
>> + "UB926_TUNER_RESET", "UB926_GPIO_SPARE", "";
>
> I assume these lines have same meaning in J721e and J7200? If so, then
> no issues.
>
>> };
>> };
>>
>>
- Péter
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