Andreas, On Mon, Jun 23, 2014 at 4:06 PM, Andreas Färber <afaerber@xxxxxxx> wrote: > I was wondering which character to type, and found two undocumented > s5m8767_pmic properties downstream (s5m-core,enable-low-jitter and > s5m-core,device_type = <0x2>), which I then left out. I don't know much about "s5m-core,device_type", but I doubt it's needed. You can see <http://crosreview.com/42202> for details. I haven't looked but I'd bet that we just get this from the compatible string now. I did do a (very!) quick look and I see that low-jitter was originally implemented in the local 3.4 kernel at <http://crosreview.com/43624>. ...and the local 3.8 kernel at <http://crosreview.com/66037>. NOTE: it's pretty important to make sure low-jitter is turned on for Chromebooks if you actually want full functionality. At least on exynos5250-snow (with the max77686 PMIC) you'd get occasional (and very strange and very hard to debug) TPM errors if you didn't have low-jitter. The TPM is part of the security model on Chromebooks and you might have a hard time accessing the encrypted parts of the disk without it. -Doug -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
